Generate a FIT update image during build. The image will be called
"u-boot.update" and can be used to build an EFI UpdateCapsule or during
DFU mode. Although, the latter isn't supported because there is no USB
OTG driver yet.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Disabling PCIE support currently lead to a crash because the code for
erratum A010315 is still run. Add a conditional to only select
CONFIG_SYS_FSL_ERRATUM_A010315 when CONFIG_PCIE_LAYERSCAPE is enabled.
Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
to fix following checkpatch warnings.
Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef' where
possible
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
When building a system that has both TPL and SPL_OS_BOOT, code which
tests for CONFIG_SPL_OS_BOOT will be built and enabled in TPL, which is
not correct. While there is no CONFIG_TPL_OS_BOOT symbol at this time
(and likely will not ever be) we can use CONFIG_IS_ENABLED(OS_BOOT) in
these common paths to ensure we only compile these parts in the SPL
case.
Signed-off-by: Tom Rini <trini@konsulko.com>
Instead of hardcoding the watchdog for reset, and the PMIC for poweroff,
use the sysreset framework to manage the available poweroff/reset
backends. This allows (as examples) using the PMIC to do a cold reset,
and using a GPIO to power off H3/H5 boards lacking a PMIC. Furthermore,
it removes the need to hardcode watchdog MMIO addresses, since the
sysreset backends can be discovered using the device tree.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The sysreset uclass unconditionally provides a definition of the
reset_cpu() function. So does the sunxi board code. Fix the build with
SYSRESET enabled by omitting the function from the board code in that
case. The code still needs to be kept around for use in SPL.
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Stefan Roese <sr@denx.de>
- add JetHub D1 eth mac generation with manufacturer OUI
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Merge tag 'u-boot-amlogic-20211102' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- add sm efuse write support and cmd for read/write efuse
- add JetHub D1 eth mac generation with manufacturer OUI
Samsung Galaxy A3, A5, A7 (2017) - middle class Samsung smartphones.
U-boot can be used as chain-loaded bootloader to gain control
on booting vanilla linux(and possibly others) kernels
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone,
for China \ Hong Kong markets.
Has unlockable bootloader, unlike SM-G960U (American market version),
which allows running u-boot as a chain-loaded bootloader.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Hi-end qualcomm chip, introduced in late 2017.
Mostly used in flagship phones and tablets of 2018.
Features:
- arm64 arch
- total of 8 Kryo 385 Gold / Silver cores
- Hexagon 685 DSP
- Adreno 630 GPU
Tested only as second-stage bootloader.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
Allows to change clock frequency of debug uart,
thus supporting wide range of baudrates.
Enable / disable functionality is not implemented yet.
In most use cases of SDM845 (i.e. mobile phones and tablets)
it's not needed, because qualcomm first stage bootloader leaves it
initialized, and on the other hand there's no possibility to
replace signed first stage bootloader with u-boot.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Add preliminary device trees for the Apple M1 mini (2020) and
Apple M1 Macbook Pro 13" (2020). Device tree bindings for
the Apple M1 SoC are still being formalized and these device
trees will be synchronized with the Linux kernel as needed.
The device trees in this commit are based on the initial Apple
M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl,
pmgr, usb based on bindings on track for inclusion in Linux
5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and
watchdog that don't have a proposed binding yet.
These device trees are provided as a reference only as U-Boot
uses the device tree passed by the m1n1 bootloader.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DART is an IOMMU that is used on Apple's M1 SoC. This driver
configures the DART such that it operates in bypass mode which is
enough to support DMA for the USB3 ports integrated on the SoC.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Apple M1 SoCs include an S5L UART which is a variant of the S5P
UART. Add support for this variant and enable it by default
on Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for Apple's M1 SoC that is used in "Apple Silicon"
Macs. This builds a basic U-Boot that can be used as a payload
for the m1n1 boot loader being developed by the Asahi Linux
project.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Add MAINTAINERS entry]
Use proper SATA macro for boot_device switch in spl_boot_device() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 2226ca1734 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
Stop using the device tree as a source for ad-hoc information.
This reverts commit 2ae7adc659.
Signed-off-by: Michael Walle <michael@walle.cc>
[trini: Also make board/broadcom/bcmns3/ns3.c fail clearly now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Ad-hoc bindings that are not part of the upstream device tree / bindings
are not allowed in-tree. Only bindings that are in-progress with
upstream and then re-synced once agreed upon are.
This reverts commit af288cb291.
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Both Ethernet and USB drivers get their reference clocks from
the versaclock. Enable that driver and the common clock driver
by default.
Signed-off-by: Adam Ford <aford173@gmail.com>
Now that TARGET_BEACON_RZG2M can handle all the work that
was done with TARGET_BEACON_RZG2N and TARGET_BEACON_RZG2H,
remove them since they just create more duplicate code.
Signed-off-by: Adam Ford <aford173@gmail.com>
The three different boards share the same board file and only differ
in terms of which SoC is being used. By enabling FIT on
TARGET_BEACON_RZG2M, it can support all three boards and elimate
duplicate code.
Signed-off-by: Adam Ford <aford173@gmail.com>
This adds support for amlogic efuse write and provides two subcommands
of "sm" command: "efuseread" and "efusewrite" to read/write bytes between
memory and efuse.
Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
[narmstrong: fixed indent at end of patch]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
- mvebu: Fix usage of BIN header arguments (Pali)
- mvebu: turris_omnia: Fix MTD partitions order for Linux (Pali)
- mvebu: nandpagesize support for kwbimage v1 (Pali)
U-Boot SPL binary does not read BIN header arguments, so passing some dummy
values 0000005b and 00000068 has no effect for U-Boot SPL code.
Probably these two values comes from old Marvell DDR training code which
was separated from U-Boot and used it for some configuration.
Seems that two 32-bit values were specified here to ensure SPL code
alignment to 128-bit boundary as it is required e.g. for A370 or AXP
processors. Main kwbimage header is 64-byte long which is aligned to
128-bit boundary. Optional kwbheader is 32-bit long, number of BIN header
arguments is stored in 32-bit number. So for alignment to 128-bit boundary
is needed 64-bit padding which exactly these two 32-bit dummy arguments
provided.
Now when mkimage correctly aligns start of executable code in BIN header to
128-bit boundary, there is no requirement to put dummy argument values into
kwbimage. So remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Important detail is availability of kwbimage BIN header arguments passed
via r0 and r1 registers by BootROM.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
OF_HOSTFILE is used on sandbox configs only. Although it's pretty
unique and not causing any confusions, we are better of having simpler
config options for the DTB.
So let's replace that with the existing OF_BOARD. U-Boot would then
have only three config options for the DTB origin.
- OF_SEPARATE, build separately from U-Boot
- OF_BOARD, board specific way of providing the DTB
- OF_EMBED embedded in the u-boot binary(should not be used in production
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make sure to (if applicable) flush the D-cache, invalidate I-cache,
and disable MMU and caches before jumping to OPTEE.
This fixes the SDP->SPL->OPTEE boot flow on iMX6Q and most likely on
some other ARM SoCs.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
- Add and enable watchdog driver
- Prepare for SYSRESET driven AXP poweroff
- Prepare for SoCs without MMC2
- Some fixes for extending SPL (SPL-DM for RISC-V)
- Some preparations for proper VBUS management
- Fix secure monitor move
Some Allwinner SoCs (e.g. R329) doesn't have a MMC2 controller at all,
and on boards that we do not utilize MMC2, the alias for it is just
useless.
Only include the alias when we specify CONFIG_MMC_SUNXI_EXTRA_SLOT to 2.
Signed-off-by: Icenowy Zheng <icenowy@sipeed.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
For some reason, the watchdog was disabled in the H616 device tree. Most
likely this is a copy-paste from the H6 device tree: the H6 watchdog is
disabled because it is broken in some chips. However, there is no
evidence of issues with the H616 watchdog.
Enable the watchdog node so it can be used by the driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
A watchdog helps recover from hangs or failure to boot an OS. It can
also be used by the sysreset framework to intentionally reset the
system. Now that a driver is available, let's enable this functionality
on sunxi boards.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The more recent Allwinner SoCs BootROMs can actually load SPL images
larger than 32KB. We use this on the H616 to fit the extra code needed
for the PMIC into the image, and have provisions in board.c to respect
that larger SPL size when booting from MMC.
However the sunxi SPL SPI loader has a hardcoded load offset of 32KB,
which will fail on the H616.
To fix this, use the same algorithm we use for MMC: if the SPL size is
smaller than 32KB, we use 32KB, otherwise we expect the U-Boot payload
directly after the SPL code.
This prepares for SPI booting with larger SPLs like on the H616.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
sunxi-common.h defines CONFIG_SPL_BSS_START_ADDR to put SPL's BSS in
DRAM. Due to this, we must select SPL_SEPARATE_BSS, or else SPL will
attempt to load its DTB from the wrong address (after BSS in DRAM).
This change fixes booting with SPL_OF_CONTROL=y.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Get Unique ID of SoC iMX7ULP, using the logic described in Fusemap
(IMX7ULPRMB2_Rev0_Fusemap) attached in the i.MX 7ULP APRM [1].
[1]
https://www.nxp.com/docs/en/reference-manual/IMX7ULPRMB2.pdf
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Since SPL has initialized clocks for bus and core. We don't need to
set the default clocks for clock controller node.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Tested-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
i.MX8MP EVK has two ethernet ports. Add relevant nodes and properties
for EQoS port to the EVK DTS file.
In -u-boot.dtsi, change the u-boot eqos compatible string, add PHY
reset gpio and remove assigned clocks as not supported in CCF.
Signed-off-by: Ye Li <ye.li@nxp.com>
i.MX8MP has two ENET controllers, have to update the function to
enable loading two MAC addresses.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
We can only select SPL_SKIP_LOWLEVEL_INIT if SPL is enabled, otherwise
we get a warning about unmet dependencies on platforms that don't use
SPL.
Fixes: cf47a8cf8f ("arm: mvebu: Select SPL_SKIP_LOWLEVEL_INIT on ARMADA_32BIT")
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Instead of declaring CONFIG_SPL_DRIVERS_MISC in board config header,
select it in Kconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Instead of declaring CONFIG_SYS_MALLOC_SIMPLE dependant on
CONFIG_SPL_BUILD in board config header, select
CONFIG_SPL_SYS_MALLOC_SIMPLE in Kconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Add code to build the eMMC variant of the Colibri iMX6ULL, i.e. the
'Colibri iMX6ULL 1GB' which has a eMMC instead of the raw NAND used
on other SKUs.
Related-to: ELB-4056, ELB-4057
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
After the conversion to binman in commit 8996e6b7c6 ("imx8mm_evk: switch
to use binman to pack images"), it is necessary to flash both flash.bin and
u-boot.itb to get a bootable system. Prior to this commit, only flash.bin
was needed.
Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.
Generate a final flash.bin that can be used again as a single
bootable binary to keep the original behavior.
After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone
(for example, for secure boot purposes).
Also update imx8mm_evk.rst to remove the u-boot.itb copy step.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Finally, found the root cause of the issue already once mentioned back
here [2] which caused the following error message during boot:
imx_wdt watchdog@30280000:
pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Turns out while the watchdog node itself was already u-boot,dm-spl its
pinctrl node was not which caused it to be unavailable at that early
stage. Note that any and all other boards I checked also seem to be
missing this. However, I can't judge whether or not they might indeed
need a similar fix or not.
[2] https://marc.info/?l=u-boot&m=161786572422973
Fixes: commit d304e7ace3
("ARM: imx8m: Fix reset in SPL on Toradex iMX8MM Verdin")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
This powers some peripherals on the carrier board e.g. the USB hub.
Related-to: ELB-3206
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Prepare for DEK blob encapsulation support through "dek_blob" command.
On ARMv8, u-boot runs in non-secure, thus cannot encapsulate a DEK blob
for encrypted boot.
The DEK blob is encapsulated by OP-TEE through a trusted application
call. U-boot sends and receives the DEK and the DEK blob binaries
through OP-TEE dynamic shared memory.
To enable the DEK blob encapsulation, add to the defconfig:
CONFIG_SECURE_BOOT=y
CONFIG_FAT_WRITE=y
CONFIG_CMD_DEKBLOB=y
Taken from NXP's commit 56d2050f40 ("imx8m: Add DEK blob encapsulation
for imx8m").
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got
introduced, in order to support a DTB handed over by an earlier stage boo
loader. However we have another option in the Kconfig (OF_BOARD) which has
identical semantics.
So let's remove the option in an effort to simplify U-Boot's config and DTB
management, and use OF_BOARD instead.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
On mvebu this is defined if and only if !ARM64.
Otherwise it is defined for boards with ARCH_MX23, ARCH_TEGRA and
ARCH_ZYNQ, and also for SOC_AR934X (tplink_wdr4300).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
In preparation for moving this option to Kconfig, rename it to be
consistent with other USB EHCI Kconfig options.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
fix up ppll init freq.
support tclk_emmc.
add freq (26M) for mmc device.
fix up the sfc clk rate unit error.
Change in V2:
remove change id.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The devicetree submitted and approved for the mainline linux kernel is
slightly different than the one present here. This syncs both
devicetrees (for the Rockchip SFC node at least) present on the PX30
and the Odroid Go Advance. Changes include renaming the flash node,
reordering the values in the SFC node for the rk3326-odroid-go2,
changing the name of the cs pinctrl node to cs0, and updating the
u-boot specific tree to utilize the new flash node value.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Starting with commit 92f1e9a4b3 ("clk: Detect failure to set
defaults") the clk driver for the PX30 would fail to probe for the
Odroid Go Advance. This patch is to remove the clock for the GPU from
the U-Boot specific devicetree, as that clock is not supported by the
U-Boot clk_px30 driver.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove some config finishing by _ badly added by
scripts/build-whitelist.sh when joker is used in comments.
for example:
doc/uImage.FIT/command_syntax_extensions.txt:
... #ifdef CONFIG_OF_* | ...
cmd/nvedit.c:# error Define one of CONFIG_ENV_IS_IN_{EEPROM| \
FLASH|MMC|FAT|EXT4|\
Remove also configs only used in comments:
- CONFIG_BOOGER in include/linux/kconfig.h
- CONFIG_COMMANDS
- CONFIG_INIT_IGNORE_ERROR
- CONFIG_REG_*
- CONFIG_HOTPLUG : drivers/watchdog/omap_wdt.c:18
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
If multiple entries are present in the memory-region property, this new
memory-region-names property can be used to specify names for each of
them so that they can be more easily distinguished.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Rather than duplicate the Ethernet MAC address and carveout updating
code for each board, move it to a common location and make it more
reusable.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reserved memory nodes can have additional flags. Support reading and
writing these flags to ensure that reserved memory nodes can be properly
parsed and emitted.
This converts support for the existing "no-map" flag to avoid extending
the argument list for fdtdec_add_reserved_memory() to excessive length.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reserved memory nodes can have a compatible string list to identify the
type of reserved memory that they represent. Support specifying an
optional compatible string list when creating these nodes.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
- Disable bi_boot_params for STM32 MCU and MPU boards
- Update stm32-usbphyc node management
- Convert CONFIG_STM32_FLASH to Kconfig for STM32 MCU boards
- Convert some USB config flags to Kconfig for various boards
- Convert CONFIG_BOOTCOMMAND flag to Kconfig for STM32 F429 board
- Remove specific CONFIG_STV0991 flags
- Remove unused CONFIG_USER_LOWLEVEL_INIT flag
- Add ofdata_to_platdata() callback for stm32_spi driver
- Update for stm32f7_i2c driver
- Remove gpio_hog_probe_all() from STM32 MP1 board
- Fix bind command
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Merge tag 'u-boot-stm32-20211012' of https://source.denx.de/u-boot/custodians/u-boot-stm
- Disable ATAGS for STM32 MCU and MPU boards
- Disable bi_boot_params for STM32 MCU and MPU boards
- Update stm32-usbphyc node management
- Convert CONFIG_STM32_FLASH to Kconfig for STM32 MCU boards
- Convert some USB config flags to Kconfig for various boards
- Convert CONFIG_BOOTCOMMAND flag to Kconfig for STM32 F429 board
- Remove specific CONFIG_STV0991 flags
- Remove unused CONFIG_USER_LOWLEVEL_INIT flag
- Add ofdata_to_platdata() callback for stm32_spi driver
- Update for stm32f7_i2c driver
- Remove gpio_hog_probe_all() from STM32 MP1 board
- Fix bind command
Signed-off-by: Tom Rini <trini@konsulko.com>
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Merge tag 'u-boot-at91-2022.01-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 features for the 2022.01 cycle:
This small feature set adds the support for PWM driver for the sama5d2
SoC. It also adds a node in the DT for this SoC.
The bulk of it is Samuel's DM_I2C rework, which removes the nasty I2C
deprecation warnings for most 32-bit boards. It also includes some
smaller refactorings that pave the way for more changes, mostly driven
by needing to support the Allwinner RISC-V SoC later on.
Board wise we gain support for the FriendlyARM NanoPi R1S H5 router
board and official Pinetab support.
Build-tested for all 160 sunxi boards, and boot tested on a A64, A20,
H3, H6, and H616 board. USB, SD card, eMMC, and Ethernet all work there
(where applicable).
Now that the last users of legacy I2C (outside of SPL) have been
resolved, we can enable DM_I2C at the sunxi architecture level.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Two displays supported by the sunxi display driver (each one used by a
single board) require initialization over I2C. Both previously used
i2c_soft; replace this with the i2c-gpio instance that already exists in
those boards' device trees (sun5i-a13-utoo-p66 and sun6i-a31-colombus).
Since the i2c-gpio nodes are not referenced by any other node in the
device trees (the device trees have no panel node), the I2C bus is
selected by its node name.
This panel initialization code was the only i2c_soft user, so the
i2c_soft GPIO setup code can be removed now as well.
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The pmic_bus functions are used in both SPL (for regulator setup) and
U-Boot proper (for regulator setup, SID access, GPIO, and poweroff).
Currently, pmic_bus conflicts with DM_I2C because it uses the legacy I2C
interface. This commit makes pmic_bus dual-compatible with either the
legacy I2C functions or the newly-added PMIC_AXP driver (which uses
DM_I2C). In turn, this allows platforms to start transitioning to DM_I2C
in U-Boot proper, without breaking boards that still depend on the
legacy I2C interface for other reasons.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Instead of using the SoC symbols to decide the bus type, use whichever
bus driver is actually enabled. This allows collapsing all of the AXP2xx
and AXP8xx variants into one "else" case. It also has the advantage of
falling back to I2C when the other bus drivers are disabled; this works
because all of the PMICs support I2C in addition to other interfaces.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.
Refactor the rsb functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.
The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants, so move that to the common header.
There are only a couple of pairs of hardware/runtime addresses used
across all PMIC variants. So far the code expected only the "primary"
pair, but some PMICs like the AXP305 and AXP805 use the secondary pair,
so add support for that to the DM driver as well.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This bus controller is used to communicate with an X-Powers AXP PMIC.
Currently, various drivers access PMIC registers through a platform-
specific non-DM "pmic_bus" interface, which depends on the legacy I2C
framework. In order to convert those drivers to use DM_PMIC, this bus
needs a DM_I2C driver.
Refactor the p2wi functions to take the base address as a parameter,
and implement both the existing interface (which is still needed in
SPL) and the DM_I2C interface on top of them.
The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants. Move that to the common header, so it can be used by
both interface implementations.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
AXP_PMIC_BUS enables communication with a specific AXP PMIC at a
PMIC-dependent I2C/P2WI/RSB bus address. It is automatically selected
as a dependency of the PMIC driver. It should not be selectable by the
user when no PMIC is chosen.
AXP_GPIO uses the pmic_bus functions, and also depends on a specific
PMIC header to pick up register definitions.
Both of these changes have no impact on any existing configs, since
the code does not compile if the dependencies are not met.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
SUN8I_RSB should not be selected by MACH_SUN8I, because the hardware
is not present in half of those SoCs (H3/H5, R40, and V3s). Move the
selection to the SoCs where the hardware actually exists.
As it currently stands, selecting that option also requires using it in
some way, which is not the case for one A80 board. Since we have only
three A80 boards in total, we select it their via their defconfigs.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fixing up Sunchip_CX-A99 build]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
CONFIG_SPL_I2C is the wrong symbol to use here. It is the top-level
Kconfig symbol (not specific to either legacy or DM I2C), whereas the
i2c_init() function is specific to legacy I2C. This change fixes a
build failure when enabling SPL_I2C but not SPL_SYS_I2C_LEGACY.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-by: Andre Przywara <andre.przywara@arm.com>
This fixes the usage of the USB 3.0-capable port under U-Boot as USB
2.0-only port.
Original patch by Chao Zeng.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Account for the changes done between merge proposal and the final merge.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs.
As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for
the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for
DDR, PER, and CORE PLLs.
Calculating the required values and setting the registers accordingly
was taken from the set_mpu_spreadspectrum routine contained in the
arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project.
In locked condition, DPLL output clock = CLKINP *[M/N]. In case of
SSC enabled, the reference manual explains that there is a restriction
of range of M values. Since the clk_ti_am3_dpll_round_rate() attempts
to select the minimum possible N, the value of M obtained is not
guaranteed to be within the range required. With the new "ti,min-div"
parameter it is possible to increase N and consequently M to satisfy the
constraint imposed by SSC.
Link: https://lore.kernel.org/r/20210606202253.31649-6-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruhl7x RM, SSC is supported only for LCD
and MPU PLLs, but the PRCM_CM_SSC_DELTAMSTEP_DPLL_XXX and
PRCM_CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field
in the PRCM_CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE,
MPU, DDR, PER, DISP, EXTDEV).
Link: https://lore.kernel.org/r/20210606202253.31649-5-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Registers for adjusting the spread spectrum clocking (SSC) have been
added. As reported by the TI spruh73x RM, SSC is supported only for LCD
and MPU PLLs, but the CM_SSC_DELTAMSTEP_DPLL_XXX and
CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field in the
CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE, MPU, DDR,
PER, DISP).
Link: https://lore.kernel.org/r/20210606202253.31649-4-dariobin@libero.it
Signed-off-by: Dario Binacchi <dariobin@libero.it>
This adds support for the NanoPi R1S H5 board.
Allwinner H5 SoC
512MB DDR3 RAM
10/100/1000M Ethernet x 2
RTL8189ETV WiFi 802.11b/g/n
USB 2.0 host port (A)
MicroSD Slot
Reset button
Serial Debug Port
WAN - LAN - SYS LED
The dts file is taken from Linux 5.14 tag.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Since the beginning, all banks have had space for 32 pins, even when
not all pins were implemented. Let's use a single constant for the GPIO
bank size here, like the GPIO driver is already doing.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This clarifies which callers must be updated to complete the DM_GPIO
conversion.
The only remaining caller of name_to_gpio in generic code is inside the
!DM_GPIO block in cmd/gpio.c. DM_GPIO is always selected on sunxi, so
that code cannot be reached. And after this commit, there are only two
remaining implementations of name_to_gpio.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
As part of migrating to DM_GPIO and DM_PINCTRL, eventually we will
remove the asm/arch/gpio.h header. In preparation, clean up the various
files that include it.
Some files did not contain any GPIO code at all, so this header was
completely unused.
A few files contained only legacy platform-specific GPIO code for
setting up pin muxes. They were left unchanged, as that code will be
completely removed by the DM_PINCTRL migration.
The remaining files contain some combination of DM_GPIO and legacy GPIO
code. For those, switch to including asm/gpio.h (if it wasn't included
already). Right now, this header provides both sets of functions,
because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the
right header to include once the DM_GPIO migration is complete and
GPIO_EXTRA_HEADER is no longer needed.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The only caller of this function was the MMC pinmux code, which used it
to parse a string given from a Kconfig symbol. As the Kconfig symbol has
been converted to a Boolean, this function is no longer needed.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Only one board, Yones Toptech BD1078, actually uses a non-default MMC
pinmux. All other uses of these symbols select the default value or an
invalid value. To simplify things, remove support for the unused pinmux
options, and convert the remaining option to a Boolean.
This allows the pinmux to be chosen by the preprocessor, instead of
having the code parse a string at runtime (for a build-time option!).
Not only does this reduce code size, but it also allows this Kconfig
option to be used in a table-driven DM pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
