- mvebu: Fix usage of BIN header arguments (Pali) - mvebu: turris_omnia: Fix MTD partitions order for Linux (Pali) - mvebu: nandpagesize support for kwbimage v1 (Pali)
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commit
aafc378a6c
8 changed files with 76 additions and 36 deletions
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@ -9,4 +9,4 @@ VERSION 1
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#@BOOT_FROM
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# Binary Header (bin_hdr) with DDR3 training code
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BINARY spl/u-boot-spl.bin 0000005b 00000068
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BINARY spl/u-boot-spl.bin
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@ -3,6 +3,15 @@
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#include <config.h>
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#include <linux/linkage.h>
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/*
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* BootROM loads the header part of kwbimage into L2 cache. BIN header usually
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* contains U-Boot SPL, optionally it can also contain additional arguments.
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* The number of these arguments is in r0, pointer to the argument array in r1.
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* BootROM expects executable BIN header code to return to address stored in lr.
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* Other registers (r2 - r12) must be preserved. We save all registers to
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* CONFIG_SPL_BOOTROM_SAVE address. BIN header arguments (passed via r0 and r1)
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* are currently not used by U-Boot SPL binary.
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*/
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ENTRY(save_boot_params)
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stmfd sp!, {r0 - r12, lr} /* @ save registers on stack */
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ldr r12, =CONFIG_SPL_BOOTROM_SAVE
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@ -72,11 +72,11 @@
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#define IBR_HDR_UART_ID 0x69
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#define IBR_HDR_SDIO_ID 0xAE
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/* Structure of the main header, version 1 (Armada 370/38x/XP) */
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/* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
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struct kwbimage_main_hdr_v1 {
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uint8_t blockid; /* 0x0 */
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uint8_t flags; /* 0x1 */
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uint16_t reserved2; /* 0x2-0x3 */
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uint16_t nandpagesize; /* 0x2-0x3 */
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uint32_t blocksize; /* 0x4-0x7 */
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uint8_t version; /* 0x8 */
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uint8_t headersz_msb; /* 0x9 */
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@ -603,7 +603,7 @@ static bool fixup_mtd_partitions(void *blob, int offset, struct mtd_info *mtd)
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mtd_probe_devices();
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list_for_each_entry(slave, &mtd->partitions, node) {
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list_for_each_entry_reverse(slave, &mtd->partitions, node) {
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char name[32];
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int part;
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@ -85,11 +85,11 @@ struct mvebu_image_info {
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};
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#endif
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/* Structure of the main header, version 1 (Armada 370/38x/XP) */
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/* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
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struct a38x_main_hdr_v1 {
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u8 blockid; /* 0x0 */
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u8 flags; /* 0x1 */
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u16 reserved2; /* 0x2-0x3 */
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u16 nandpagesize; /* 0x2-0x3 */
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u32 blocksize; /* 0x4-0x7 */
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u8 version; /* 0x8 */
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u8 headersz_msb; /* 0x9 */
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@ -932,6 +932,12 @@ static size_t image_headersz_v1(int *hasext)
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*/
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headersz = sizeof(struct main_hdr_v1);
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if (image_get_csk_index() >= 0) {
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headersz += sizeof(struct secure_hdr_v1);
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if (hasext)
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*hasext = 1;
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}
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count = image_count_options(IMAGE_CFG_DATA);
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if (count > 0)
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headersz += sizeof(struct register_set_hdr_v1) + 8 * count + 4;
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@ -963,15 +969,10 @@ static size_t image_headersz_v1(int *hasext)
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return 0;
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}
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headersz += sizeof(struct opt_hdr_v1) +
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ALIGN(s.st_size, 4) +
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(binarye->binary.nargs + 2) * sizeof(uint32_t);
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if (hasext)
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*hasext = 1;
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}
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if (image_get_csk_index() >= 0) {
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headersz += sizeof(struct secure_hdr_v1);
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headersz += sizeof(struct opt_hdr_v1) + sizeof(uint32_t) +
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(binarye->binary.nargs) * sizeof(uint32_t);
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headersz = ALIGN(headersz, 16);
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headersz += ALIGN(s.st_size, 4) + sizeof(uint32_t);
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if (hasext)
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*hasext = 1;
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}
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@ -984,9 +985,12 @@ static size_t image_headersz_v1(int *hasext)
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}
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int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext,
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struct image_cfg_element *binarye)
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struct image_cfg_element *binarye,
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struct main_hdr_v1 *main_hdr)
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{
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struct opt_hdr_v1 *hdr = (struct opt_hdr_v1 *)*cur;
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uint32_t add_args;
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uint32_t offset;
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uint32_t *args;
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size_t binhdrsz;
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struct stat s;
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@ -1009,12 +1013,6 @@ int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext,
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goto err_close;
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}
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binhdrsz = sizeof(struct opt_hdr_v1) +
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(binarye->binary.nargs + 2) * sizeof(uint32_t) +
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ALIGN(s.st_size, 4);
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hdr->headersz_lsb = cpu_to_le16(binhdrsz & 0xFFFF);
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hdr->headersz_msb = (binhdrsz & 0xFFFF0000) >> 16;
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*cur += sizeof(struct opt_hdr_v1);
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args = (uint32_t *)*cur;
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@ -1025,6 +1023,19 @@ int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext,
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*cur += (binarye->binary.nargs + 1) * sizeof(uint32_t);
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/*
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* ARM executable code inside the BIN header on some mvebu platforms
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* (e.g. A370, AXP) must always be aligned with the 128-bit boundary.
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* This requirement can be met by inserting dummy arguments into
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* BIN header, if needed.
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*/
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offset = *cur - (uint8_t *)main_hdr;
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add_args = ((16 - offset % 16) % 16) / sizeof(uint32_t);
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if (add_args) {
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*(args - 1) = cpu_to_le32(binarye->binary.nargs + add_args);
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*cur += add_args * sizeof(uint32_t);
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}
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ret = fread(*cur, s.st_size, 1, bin);
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if (ret != 1) {
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fprintf(stderr,
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@ -1043,6 +1054,12 @@ int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext,
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*cur += sizeof(uint32_t);
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binhdrsz = sizeof(struct opt_hdr_v1) +
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(binarye->binary.nargs + add_args + 2) * sizeof(uint32_t) +
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ALIGN(s.st_size, 4);
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hdr->headersz_lsb = cpu_to_le16(binhdrsz & 0xFFFF);
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hdr->headersz_msb = (binhdrsz & 0xFFFF0000) >> 16;
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return 0;
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err_close:
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@ -1214,6 +1231,9 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
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e = image_find_option(IMAGE_CFG_NAND_BLKSZ);
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if (e)
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main_hdr->nandblocksize = e->nandblksz / (64 * 1024);
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e = image_find_option(IMAGE_CFG_NAND_PAGESZ);
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if (e)
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main_hdr->nandpagesize = cpu_to_le16(e->nandpagesz);
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e = image_find_option(IMAGE_CFG_NAND_BADBLK_LOCATION);
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if (e)
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main_hdr->nandbadblklocation = e->nandbadblklocation;
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@ -1299,7 +1319,7 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params,
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if (e->type != IMAGE_CFG_BINARY)
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continue;
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if (add_binary_header_v1(&cur, &next_ext, e))
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if (add_binary_header_v1(&cur, &next_ext, e, main_hdr))
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return NULL;
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}
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@ -73,7 +73,7 @@ struct ext_hdr_v0 {
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struct main_hdr_v1 {
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uint8_t blockid; /* 0x0 */
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uint8_t flags; /* 0x1 */
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uint16_t reserved2; /* 0x2-0x3 */
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uint16_t nandpagesize; /* 0x2-0x3 */
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uint32_t blocksize; /* 0x4-0x7 */
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uint8_t version; /* 0x8 */
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uint8_t headersz_msb; /* 0x9 */
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@ -255,7 +255,7 @@ static unsigned char kwboot_baud_code[] = {
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};
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#define KWBOOT_BAUDRATE_BIN_HEADER_SZ (sizeof(kwboot_baud_code) + \
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sizeof(struct opt_hdr_v1) + 8)
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sizeof(struct opt_hdr_v1) + 8 + 16)
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static const char kwb_baud_magic[16] = "$baudratechange";
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@ -1328,11 +1328,10 @@ kwboot_add_bin_ohdr_v1(void *img, size_t *size, uint32_t binsz)
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{
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struct main_hdr_v1 *hdr = img;
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struct opt_hdr_v1 *ohdr;
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uint32_t num_args;
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uint32_t offset;
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uint32_t ohdrsz;
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ohdrsz = binsz + 8 + sizeof(*ohdr);
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kwboot_img_grow_hdr(img, size, ohdrsz);
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if (hdr->ext & 0x1) {
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for_each_opt_hdr_v1 (ohdr, img)
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if (opt_hdr_v1_next(ohdr) == NULL)
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@ -1345,13 +1344,26 @@ kwboot_add_bin_ohdr_v1(void *img, size_t *size, uint32_t binsz)
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ohdr = (void *)(hdr + 1);
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}
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/*
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* ARM executable code inside the BIN header on some mvebu platforms
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* (e.g. A370, AXP) must always be aligned with the 128-bit boundary.
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* This requirement can be met by inserting dummy arguments into
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* BIN header, if needed.
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*/
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offset = &ohdr->data[4] - (char *)img;
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num_args = ((16 - offset % 16) % 16) / sizeof(uint32_t);
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ohdrsz = sizeof(*ohdr) + 4 + 4 * num_args + binsz + 4;
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kwboot_img_grow_hdr(hdr, size, ohdrsz);
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ohdr->headertype = OPT_HDR_V1_BINARY_TYPE;
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ohdr->headersz_msb = ohdrsz >> 16;
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ohdr->headersz_lsb = cpu_to_le16(ohdrsz & 0xffff);
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memset(&ohdr->data[0], 0, ohdrsz - sizeof(*ohdr));
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*(uint32_t *)&ohdr->data[0] = cpu_to_le32(num_args);
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return &ohdr->data[4];
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return &ohdr->data[4 + 4 * num_args];
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}
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static void
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@ -1416,13 +1428,6 @@ kwboot_img_patch(void *img, size_t *size, int baudrate)
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if (csum != hdr->checksum)
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goto err;
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if (image_ver == 0) {
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struct main_hdr_v0 *hdr_v0 = img;
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hdr_v0->nandeccmode = IBR_HDR_ECC_DISABLED;
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hdr_v0->nandpagesize = 0;
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}
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srcaddr = le32_to_cpu(hdr->srcaddr);
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switch (hdr->blockid) {
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hdr->blockid = IBR_HDR_UART_ID;
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}
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if (!is_secure) {
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if (image_ver == 0)
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((struct main_hdr_v0 *)img)->nandeccmode = IBR_HDR_ECC_DISABLED;
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hdr->nandpagesize = 0;
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}
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if (baudrate) {
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uint32_t codesz = sizeof(kwboot_baud_code);
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void *code;
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