8f9e91ad03
These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.12.y With the following command: git format-patch -N v6.12.27..HEAD (HEAD -> 8d3206ee456a5ecdf9ddbfd8e5e231e4f0cd716e) Exceptions: - (def)configs patches - github workflows patches - applied & reverted patches - readme patches - wireless patches Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
41 lines
1.6 KiB
Diff
41 lines
1.6 KiB
Diff
From 198ae80fecb40a9a99c6d301277c794f5e07548b Mon Sep 17 00:00:00 2001
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From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Date: Tue, 11 Feb 2025 13:47:27 +0000
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Subject: [PATCH] clk: rp1: Allow audio out to use PLL_AUDIO_SEC; workaround
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rounding error
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Connect PLL_AUDIO_SEC to CLK_AUDIO_OUT, which had been commented out
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to avoid interference with I2S: we expect them never to be enabled
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at the same time. Work around a rounding error that occurs when the
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desired rate is exactly the max but not exactly achievable by the PLL.
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Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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---
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drivers/clk/clk-rp1.c | 8 +++++---
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1 file changed, 5 insertions(+), 3 deletions(-)
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--- a/drivers/clk/clk-rp1.c
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+++ b/drivers/clk/clk-rp1.c
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@@ -1326,9 +1326,11 @@ static void rp1_clock_choose_div_and_pra
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/*
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* Prevent overclocks - if all parent choices result in
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* a downstream clock in excess of the maximum, then the
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- * call to set the clock will fail.
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+ * call to set the clock will fail. But due to round-to-
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+ * nearest in the PLL core (which has 24 fractional bits),
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+ * it's expedient to tolerate a tiny error (1Hz/33MHz).
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*/
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- if (tmp > clock->data->max_freq)
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+ if (tmp > clock->data->max_freq + (clock->data->max_freq >> 25))
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*calc_rate = 0;
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else
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*calc_rate = tmp;
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@@ -2006,7 +2008,7 @@ static const struct rp1_clk_desc clk_des
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[RP1_CLK_AUDIO_OUT] = REGISTER_CLK(
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.name = "clk_audio_out",
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.parents = {"", //"pll_audio",
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- "", //"pll_audio_sec",
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+ "pll_audio_sec",
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"pll_video_sec",
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"xosc",
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"clksrc_gp0",
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