6339204c212b CMakeLists.txt: bump minimum cmake version
c1be505732e6 udebug: fix crash in udebug_entry_vprintf with longer strings
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Adds MediaTek MT7916AN and Cypress CYW43455 (Raspberry Pi 5) devices.
a34977c devices: add device id for Cypress CYW43455
3eb34df devices: add device id for MediaTek MT7916AN
There are no ABI changes.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Enabling this causes slow iwinfo calls on Raspberry Pi and LuCI slows down
when wireless is enabled.
Fixes: https://github.com/openwrt/openwrt/issues/14013
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This patch has been reverted in the Raspberry Pi linux repository.
Also refresh the rest of the patches.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Backport merged upstream patch that adds support for firmware loader
from NVMEM or attached filesystem for Aquantia PHYs.
Refresh all kernel patches affected by this change.
Also update the path for aquantia .ko that got moved to dedicated
directory upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
[rmilecki: port to 5.15]
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Use shared workflow in actions-shared-workflows instead of keeping the
workflow in openwrt main branch to make it easier to maintain and update
without bloating the main repository commit history.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
They are unnecessary since ipq806x switched to DSA in
the commit 337e36e0ef.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Refresh HSGMII patch due to recent PHY backport that cause
compilation warning for case not handled in phy_interface_num_ports.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Refresh 2.5G-SGMII patch due to recent PHY backport that cause
compilation warning for case not handled in phy_interface_num_ports.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
In order to get rid of having to modify U-boot bootcmd and having U-boot
load the Aquantia PHY-s firmware lets use some of the free space on SPI-NOR
to add a second ethphyfw partition and be able to load AQR FW via NVMEM
cells.
Signed-off-by: Robert Marko <robimarko@gmail.com>
It seems that the reset GPIO-s defined for the two AQR PHY-s are actually
reversed.
Manually testing confirmed that GPIO44 is actually reset GPIO of AQR at 0,
while GPIO59 is reset of AQR at 8:
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 44=0
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 44=1
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 59=0
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
root@OpenWrt:~# gpioset gpiochip0 59=1
root@OpenWrt:~# mdio 9*
DEV PHY-ID LINK
0x00 0x00000000 down
0x08 0x00000000 down
0x10 0x004dd0b1 down
0x11 0x004dd0b1 down
0x12 0x004dd0b1 down
0x13 0x004dd0b1 up
0x14 0x004dd0b1 down
0x15 0x04820a05 down
Signed-off-by: Robert Marko <robimarko@gmail.com>
