With the follow up EEE patches the mdio bus will run c22 and c45
accesses during initial scan. Especially when accessing addresses
beyond the CPU port phy requests might fail in a way that cannot
be handled gratefully. Do two things
- do not allow access to addresses starting from cpu port
- set the scan disable bitmask to ports starting from cpu port
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some bits where missed during the last enhancement of the mdio
patch. In the forthcoming patches the phy_mask will be populated
to avoid unwanted ports (>= cpu port) from being scanned. Add
additional locations where 32 bit values need to be converted
to 64 bits.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
If mmd and normal phy ops are issued the bus is lost because
of wrong park page settings. Force it to 0x1f as in GPL.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Allow to build the new kernel.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
The new kernel has relocated the definition of struct platform_device.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
The DSA driver uses set_mac_eee() for the outside API while
the interal helper is called port_eee_set(). Align that.
Additionally do not call the internal helpers directly by
the function names but use the register assignments.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream will get rid of the get_mac_eee() function in the DSA
driver and replace it by a boolean alternative. While we fill a
lot of data here (because of EEE bugs in the Realtek phy layer)
other DSA drivers only return if EEE is available or not for a
port. To make the next kernel upgrade easier follow that design.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
To avoid unneeded interrupts the R4K timer is deactivated during
secondary cpu initialization. This is currently done during
phase init_secondary(). With the upgrade to 6.12 the kernel runs
a primary/secondary cpu timer/counter synchronization to verify the
proper setup in synchronise_count_slave(). That runs at a later
point in time and expects the secondary counter to be fully
functional. Finding a deactivated counter results in the following
messages:
WARNING: CPU: 1 PID: 0 at arch/mips/kernel/sync-r4k.c:99 check_counter_warp+0x220/0x254
Warning: zero counter calibration delta: 0 [max: 6500000]
Counter synchronization [CPU#0 -> CPU#1]:
Measured 278760029 cycles counter warp between CPUs
Relocate the deactivation to smp_finsh() at the end of the cpu
startup sequence. Additionally polish the startup code and remove
all unneeded parts.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Per IEEE 802.3 definition we have:
- parallel XGMII for single 10GBit ONLY links
- serial USGMII for 8 port 1GBit links (not known by kernel)
- serial USXGMII: for single/multiple links with a total bandwidth of 10GBit
The phy-mode of the first eight ports of the XGS1250-12 have always been
defined as XGMII (without S). This came from a confusion with the similar
named Realtek proprietary XSGMII (with S) mode that is basically 10GB SGMII.
From the above definition this is wrong but worked until kernel 6.6. With
the upgrade to 6.12 there is an enforced capabilities check within
phy_caps_from_interface() and link validation fails with
lan1: validation of xgmii with support 62ef and advertisement 62c0 failed: -EINVAL
lan1: failed to connect to PHY: -EINVAL
lan1: error -22 setting up PHY for tree 0, switch 0, port 0
Switch the ports to USXGMII as the most flexible option. This might be no
final solution but at least it better describes the phy/mac link.
Fixes 5b8b382df9 ("realtek: Add support for ZxXEL XGS1250-12 Switch")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix minor compilation errors due to kernel changes.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream has integrated the Realtek target into the generic MIPS
initialization and so MACH_REALTEK_RTL has gained some new features.
Especially:
- CONFIG_MACH_GENERIC_CORE generates central modules
- board-realtek module adds device specific extensions
The current downstream initialization works well and upgrading to
kernel 6.12 is not the right time to harmonize this. Modify the
MACH definitions to the current needs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
The validate function no longer exists in phylink_mac_ops. Remove
it for the internal ethernet interface. Instead provide some
meaningful mac capabilities.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Not only the link but also the mac capabilities are needed here.
Additionally do some alphabetical sorting.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
The old upstream notation has been changed to something not so racist.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
EEE functions are now called with ethtool_keee instead of
ethtool_eee. Replace all occurrences. This will fix function
signature checks but still produces compilation errors due
to structure changes.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Patches where fuzz had to be cleaned up.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
All these patches needed no manual intervention and applied cleanly
with new source code positions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Thanks to Chris Packham this driver got upstreamed. Drop the
downstream files and patches.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
Automatically generated commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18935
Signed-off-by: Robert Marko <robimarko@gmail.com>
* Extends SoC thermal sensor on rtl839x
* Tested on HP JG928A
Signed-off-by: Stephen Howell <howels@allthatwemight.be>
Link: https://github.com/openwrt/openwrt/pull/18825
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support for V3 of the Engenius EWS2910P PoE switch. Like its v1
brother, This is an RTL8380 based switch with two SFP slots, and PoE
802.3af one every RJ-45 port.
Unlike its older brother, the max budget is 55W instead of 61.6 W.
Investigation into the communication protocol with the PoE controller
is ongoing, though it appears the vendor firmware configures the PSE
with a per-port budget of 30.0W.
Specifications:
---------------
* SoC: Realtek RTL8380M
* Flash: 32 MiB SPI flash Macronix MX25L25635E
* RAM: 256 MiB (As reported by bootloader)
* Ethernet: 8x 10/100/1000 Mbps with PoE
2x SFP slots
* Buttons: 1 "Reset" button on front panel
1 "LED mode: button on front panel
1 "On/Off" Toggle switch on the back
* Power: 48V-54V DC barrel jack
* UART: 1 serial header (JP1) with populated 2.54mm pitch header
Labeled GRTV for ground, rx, tx, and 3.3V respectively
* PoE: 1 STM ST32... microcontroller (U15)
1 RTL8238B PSE controller
Works:
------
- (8) RJ-45 ethernet ports
- Switch functions
- LEDs and buttons
Not yet enabled:
----------------
- Power-over-Ethernet (requires realtek-poe support for RTL8232B)
Install via web interface:
-------------------------
The factory firmware will accept and flash the initramfs image. It is
recommended to flash to "Partition 0". Flashing to "Partition 1" is
not supported at this point.
The factory web GUI will show the following warning:
" Warning: The firmware version is v0.00.00-c0.0.00
The firmware image you are uploading is older than the current
firmware of the switch. The device will reset back to default
settings. Are you sure you want to proceed?"
This is expected when flashing OpenWrt. After the initramfs image
boots, flash the -sysupgrade using either the commandline or LuCI.
Install via serial console/tftp:
--------------------------------
See commit 2cfaab4549 ("realtek: add support for EnGenius EWS2910P").
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15217
Signed-off-by: Robert Marko <robimarko@gmail.com>
When the Engenius EWS-2910P was added, only v1 was known. Move the
common parts to a dtsi, and split up the support to acccount for the
hardware version.
On v3, for example, the root partition uses a different uImage magic.
Add a "engenius,ews2910p-v1" compatible, while leaving the legacy
"engenius,ews2910p" to also mean v1.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15217
Signed-off-by: Robert Marko <robimarko@gmail.com>
DSA silently drops internal phy access to ports >= 32 in dsa_user_phy_read()
and dsa_user_phy_write(). The code shows:
static int dsa_user_phy_read(struct mii_bus *bus, int addr, int reg)
{
struct dsa_switch *ds = bus->priv;
if (ds->phys_mii_mask & (1 << addr))
return ds->ops->phy_read(ds, addr, reg);
return 0xffff;
}
With ds->phys_mii_mask being a 32 bit variable the reason is clear. So do
not only increase the max values but also adapt the needed bitmasks in
the dsa and phy code. This fixes the dsa_user_ports() and dsa_cpu_ports()
too.
While we are here combine the old separated patches because dsa, mdio and
phy are tigthly coupled.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18846
Signed-off-by: Robert Marko <robimarko@gmail.com>
In 2023 upstream has tightened compiler checks with this patch
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit
/scripts/Makefile.extrawarn?h=v6.15&id=0fcb70851fbfea1776ae62f67c503fef8f0292b9
A consistent function definition is now needed. I.e.
- functions must be either declared with "static" or
- functions need an additional declaration (in the header file)
Before upgrading the Realtek target to 6.12 clean the code so that the main
6.12 PR can focus on real issues from the version bump.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18925
Signed-off-by: Robert Marko <robimarko@gmail.com>
In 2023 upstream has tightened compiler checks with this patch
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit
/scripts/Makefile.extrawarn?h=v6.15&id=0fcb70851fbfea1776ae62f67c503fef8f0292b9
A consistent function definition is now needed. I.e.
- functions must be either declared with "static" or
- functions need an additional declaration (in the header file)
Before upgrading the Realtek target to 6.12 clean the code so that the main
6.12 PR can focus on real issues from the version bump.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18925
Signed-off-by: Robert Marko <robimarko@gmail.com>
In 2023 upstream has tightened compiler checks with this patch
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit
/scripts/Makefile.extrawarn?h=v6.15&id=0fcb70851fbfea1776ae62f67c503fef8f0292b9
A consistent function definition is now needed. I.e.
- functions must be either declared with "static" or
- functions need an additional declaration (in the header file)
Before upgrading the Realtek target to 6.12 clean the code so that the main
6.12 PR can focus on real issues from the version bump.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18925
Signed-off-by: Robert Marko <robimarko@gmail.com>
In 2023 upstream has tightened compiler checks with this patch
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit
/scripts/Makefile.extrawarn?h=v6.15&id=0fcb70851fbfea1776ae62f67c503fef8f0292b9
A consistent function definition is now needed. I.e.
- functions must be either declared with "static" or
- functions need an additional declaration (in the header file)
Before upgrading the Realtek target to 6.12 clean the code so that the main
6.12 PR can focus on real issues from the version bump.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18925
Signed-off-by: Robert Marko <robimarko@gmail.com>
In 2023 upstream has tightened compiler checks with this patch
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit
/scripts/Makefile.extrawarn?h=v6.15&id=0fcb70851fbfea1776ae62f67c503fef8f0292b9
A consistent function definition is now needed. I.e.
- functions must be either declared with "static" or
- functions need an additional declaration (in the header file)
Before upgrading the Realtek target to 6.12 clean the code so that the main
6.12 PR can focus on real issues from the version bump.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18925
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are still a lot of mdio functions scattered around the code.
Move the RTL838x serdes helpers closer to the bus, add the proper
prefix and simplify the functions.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18847
Signed-off-by: Robert Marko <robimarko@gmail.com>
There is a patch/bug cascade in the realtek target phy code that must be resolved.
1. The phy_driver structure is patched to add features ONLY needed for RTL8214FC
2. The kernel is patched to allow switching fiber/copper port of phys through ethtool
by calling these new features.
3. With those patches applied the bootup always switches RTL8214FC ports to copper.
Even if a SFP module was found before and the phy driver switched to fibre before.
3. So another patch is needed that reprobes the SFP module to activate fiber again.
4. Because of the reprobing we need a fourth patch that avoid duplicate devices.
Simplify this by removing all patches and reusing the existing ethtool phy tunable
interface. The command line usage might be counterintuitive but it avoids tons of
problems in the code. In addition, this scenario is not used frequently.
Before:ethtool -s lan25 port fibre/tp
After: ethtool --set-phy-tunable lan25 downshift on/off
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18816
Signed-off-by: Robert Marko <robimarko@gmail.com>
The MIPS CPC (Cluster Power Controller) is setup during boot and can take
its configuration from the devicetree. This is currently not possible
because the cpc probing happens before dt initialization. Call order
during startup is:
setup_arch()
prom_init() <- our function
mips_cpc_probe()
smp_stuff()
arch_mem_init()
device_tree_init() <- our function
unflatten_and_copy_device_tree()
To avoid ugly hacking and support a clean devicetree relocate the cps/smp
stuff to device_tree_init(). This is basically the same location as in
generic mips initialization.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Link: https://github.com/openwrt/openwrt/pull/18888
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make it easier to upgrade the kernel in the future. For this remove
the 320-harden-fw_init_cmdline.patch and add the logic into the
startup sequence at the right place.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18853
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL931x devices are dual core with two threads each. That is a total
of 4 VPEs (CPUs) in the kernel. Adapt the kernel config for that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Link: https://github.com/openwrt/openwrt/pull/18889
Signed-off-by: Robert Marko <robimarko@gmail.com>
Since the early beginning of the Realtek DSA driver there is an uncovered
locking issue between the standard (parent) mdio bus and the DSA (child)
mdio bus. This comes from the fact that the DSA bus simply links to the
parent read and write functions and calls them directly. This leads to
the following lock issue.
- Child bus calls phy_read/write functions and uses its internal lock
- Parent bus calls phy_read/write functions and uses its internal lock
It becomes clear that critical section can be accessed twice without
knowing that a operation from the other bus is currently active. This
can lead to critical malfunctions because the mdio driver needs a lot of
internal magic to get page selection done right. Effects are:
- The original page is lost after a phy_write/read_paged() call
- dmesg like "Realtek RTL8218B (external) rtl838x slave mii-0:00:
Expected external RTL8218B, found PHY-ID 6b23"
Other DSA drivers simply use the read/write functions from the parent bus
and thus avoid locking issues. Do it the same way.
Fixes: 2b88563ee5 ("realtek: update the tree to the latest refactored version")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18824
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are currently two power functions for the RTL8214FC in the driver
- rtl8380_rtl8214fc_on_off(): powers on/off both ports
- rtl8214fc_power_set(): powers on/off fibre or copper individually
While it seems obvious to merge these, one of them uses extended register
29 and the other register 30 to achieve the update. From looking at the
GPL source drops both methods exist with exactly the same operations. So
where to go from here? The descision was made based on:
- register 30 is only used during patching, 29 during normal operation
- Avoid raw page if possible to use function for RTL839x
So the attached patch was created. The result in the power down bits
was compared for the two old and the new implementation. Result is
always the same.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18707
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL9311 switches (like the Linksys LGS352C) will boot but have not set
the right family id in the soc_info structure. Fix that so drivers do
their work right when checking for that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18871
Signed-off-by: Robert Marko <robimarko@gmail.com>
Cleanup the code of the RTL83xx packet receive interrupt handler. Not
only for better readability but to avoid inconsistencies and stalls on
the RTL839x targets.
The current implementation seems to come from the GPL source code.
Calling the existing cleanup() function inside the interrupt context
without any locks conflicts with SMP & NAPI polling and makes things
worse instead of giving any benefit. Simply ignore RX buffer overruns
and let the device handle packet dropping itself.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18855
Signed-off-by: Robert Marko <robimarko@gmail.com>
RFC4541, section 2.1.2 says:
Packets with a destination IP (DIP) address in the 224.0.0.X range
which are not IGMP must be forwarded on all ports.
And section 3 says:
In IPv6, the data forwarding rules are more straight forward because
MLD is mandated for addresses with scope 2 (link-scope) or greater.
The only exception is the address FF02::1 which is the all hosts
link-scope address for which MLD messages are never sent. Packets
with the all hosts link-scope address should be forwarded on all
ports.
However, currently when a listener on FF12::1 or FF12:🔢0:1 for
example joins then not only packets to these addresses but also for
FF02::1 won't be flooded to all ports anymore, too. Which violates
RFC4541.
This happens because A): They all map to the same ethernet multicast
address, that is 33:33:00:00:00:01. And B) the VLAN profile L2
unknown MC flood setting will only apply flooding of 33:33:00:00:00:01
if there is no specific listener registered for it.
So to fix this, avoid registering an MDB entry in the switch for
33:33:00:00:00:01 at all.
The downside of this is that FF12::1, FF12:🔢0:1 etc.
will always be flooded, too. However fixing the handling of 224.0.0.X
and FF02::1 and adhering to RFC4541 must have priority to avoid
undesired packetloss, to avoid breaking IPv4/IPv6.
Tested-on: ZyXEL GS1900-24HP v1
Fixes: cde31976e3 ("realtek: Add support for Layer 2 Multicast")
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/18769
Signed-off-by: Robert Marko <robimarko@gmail.com>
Kernel does
if (phydev->drv->set_loopback)
ret = phydev->drv->set_loopback(phydev, enable, speed);
else
ret = genphy_loopback(phydev, enable, speed);
So no need to explicitly set genphy_loopback() in phy_driver. Drop
references to let kernel do its work.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18782
Signed-off-by: Robert Marko <robimarko@gmail.com>
We are lucky to have a working realtek environment. But some things where mixed
heavily. To say it clear a bus is a bus and an ethernet is an ethernet. With
the new naming conventions and defines this becomes even more obvious.
Decouple it by moving the bus specific parts out of the ethernet device. To
make the code more readable rename bus_priv variables to priv and sort variable
definitions in inverse tree order (length descending) where it makes sense.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18402
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
At least since 2022 there is a major bug in the MDIO driver that
produces out-of-bound reads and erratic behaviour during initialization.
- mdiobus_scan_bus_c22() scans the bus for 64 devices (PHY_MAX_ADDR)
- private bus structure only supports 57 entry arrays (MAX_PORTS)
All the bus/reader writer functions accept calls with addr>=57 and will
silently read beyond their limits. This can lead to ghost SERDES like
https://github.com/openwrt/openwrt/issues/18665#issuecomment-2846053813
Add proper boundary checks and end the functions with -ENODEV that is
the only accepted error code from the bus scan function.
Fixes: 0536c582e6 ("realtek: Fix RTL931X Ethernet driver") etc ...
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18402
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
These two arrays have been fixed to some sane size (= 64 ports). Now
that everything is in place reuse the global RTMDIO_MAX_PORT define.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18402
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Relocate the bus structure definition into the MDIO source code area
of the ethernet driver. So if the real bus driver is forked from the
rest of the code only one area needs to be removed. Rename it to make
clear it belongs to the bus.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18402
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Although a dfine is used to set the maxiumum number of SMI
busses (=4) it is not used at all appropriate places in the code.
Replace hard coded constants with that define.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18402
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Inside the ethernet driver lives the mdio bus. It is not always clear
what belongs where. Prefix some leftovers from the kernel 6.6 refactor
to clearly state what belongs to the bus. Group all defines together
in one place. This commit has no functional changes.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18402
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
There are no supported devices on this sub-target. It can be
considered that it is still under development. Therefore,
there is no need to make the buildbot build it every day.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18757
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL8214FC currently uses generic PHY functions. That makes it look like a copper
device. Switching to/from fibre works fortunately but the autonegotiation handling
still works on MII_LPA (PHY register 5) as if a copper link is used. Fix that by
- advertising a superset of TP/FIBRE features
- using clause 37 functions when on fibre
Additionally enhance the code of the driver to assist further development.
- log the speed of the inserted module to detect wrongly inserted 10gbase-r modules
- order phy driver functions alphabetically (keep match/name on top)
- remove genphy_loopback as the kernel uses it if not provided
Remark! The driver internally uses PORT_MII for the TP port. Align with that and
report MII to ethtool instead of TP. Other drivers do the same and it can be
changed in the future if needed.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18724
Signed-off-by: Robert Marko <robimarko@gmail.com>
When many multicast entries are installed broadcast flooding might
potentially stop working for several ports. This is because the layer
2 broadcast flood port mask index has the wrong offset. It should be
9 bits, matching the 2^9 = 512 indexes on rtl838x, not 12.
The wrong offset leads to L2_BC_FLD_PMSK being set to 504, not 511
((511 << 12) >> 9) & 511 = 504). So, as by default an unset PMSK
is set to all ports, the issue would only become noticeable once
many multicast entries are installed, causing the 504th entry to be set
to something other than all ports.
Fixing this by setting the offset to 9 bits, to correctly point to our
511th reserved entry for all ports.
Tested-on: ZyXEL GS1900-24HP v1
Fixes: 28e972b2ea ("realtek: Configure initial L2 learning setup")
Signed-off-by: Linus Lüssing <linus.luessing@c0d3.blue>
Link: https://github.com/openwrt/openwrt/pull/18733
Signed-off-by: Robert Marko <robimarko@gmail.com>
Some DTS files have a qsgmii link mode for the CPU port. This does
not harm but it is wrong. The CPU port of the realtek switch is always
directly connected to the switch by some unknown wiring and should
therefore be described as internal. Align the wrongly defined DTS
files to the standard.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18691
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit d7e82c78d7 added a generic kernel patch that exposes a new
symbol REALTEK_PHY_HWMON when REALTEK_PHY and HWMON are enabled. The new
symbol was added to kmod-phy-realtek, but the kmod is not used in the
realtek target.
Fixes: d7e82c78d7 ("generic: backport Realtek PHY patches from upstream")
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Probing of the RTL8214FC on RTL839x is currently very strange.
- On RTL8393 nothing is detected and only generic PHY is reported
- On RTL8392 the port 1 is not detected while port 2-4 seem to work
Someone left a special RTL8393 detection rules that seems to indicate
that the we probe the internal SerDes instead. That is not true. Since
upgrade to kernel 6.6 the RTL8218/RTL8214FC detection is 100% accurate
and probing functions are only called when really needed.
Fix the issue by removing the condition. For now do PHY patching only
on the RTL838x where it already worked before.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18671
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
The ATS SFP GT-T quirk patch was backported to stable kernel 6.6 but
was not notice while bumping the kernel version as they listed the quirk
at the bottom of the SFP quirk table while our hack patch put it at the
top.
With migrating to the upstream version, the duplication was made more
apparent.
Drop the double entry for the SFP module as it's already there and not
needed and refresh patches.
Link: https://github.com/openwrt/openwrt/pull/18484
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Move all patch that got merged upstream from pending to backport and add
related tag. This is to make it easier to update to kernel 6.12.
Patch 680 required some special care as the upstream version had to be
split in a series of 6 patch.
Referesh all affected patch.
Link: https://github.com/openwrt/openwrt/pull/18464
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This patch adds support for D-Link DGS-1210-26 rev. F1
Hardware specification
----------------------
* RTL8382M SoC, 1 MIPS 4KEc core @ 500MHz
* 128MB DRAM
* 32MB NOR Flash (MX25L25635E)
* 24 x 10/100/1000BASE-T ports
* 2 x SFP ports
* Power LED
* Reset button on front panel
Installation using OEM webinterface
-----------------------------------
1. Make sure you are running OEM firmware from secondary slot. If not, switch to image2 using the menus
System > Firmware Information > Boot from image2
Tools > reboot
2. Upload image squashfs-factory_image1.bin via Tools > Backup / Upgrade Firmware > image1
3. Toggle startup image via System > Firmware Information > Boot from image1
4. Tools > reboot
Known working firmware version for this procedure: 6.20.007
Installation using TFTP and serial console
------------------------------------------
1. Prepare a TFTP server with the OpenWrt *initramfs-kernel.bin and assign it an IP from 10.90.90.0/24 (except 10.90.90.90)
2. Connect the TFTP server to one of switch's ports
3. Connect to the serial console (115200 baud) and power on the switch
4. Press the ESC key once you see "Hit Esc key to stop autoboot" in the console output
5. Press CTRL+C keys to get into the real U-Boot prompt
6. Init the network with the command "rtk network on"
7. Load the OpenWrt image with the command "tftpboot 0x8f000000 <TFTP_SERVER_IP>:<IMAGE_FILE>"
(<TFTP_SERVER_IP> is the TFTP server's IP, e.g. 10.90.90.100; <IMAGE_FILE> is the name of the image provided by the TFTP server)
8. Boot the OpenWrt image with the command "bootm"
9. Browse to https://192.168.1.1/cgi-bin/luci/admin/system/flash
10. Upload the the OpenWrt *squashfs-sysupgrade.bin to the switch
11. Wait for it to reboot
Signed-off-by: Christian Steiner <christian.steiner@outlook.de>
Link: https://github.com/openwrt/openwrt/pull/18378
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Currently, network ports using PHYs get a link, but there is no traffic.
Make it work again by moving the MAC config to phylink_mac_link_up.
A similiar change has been previously applied for RTL83xx in commit
cd958d945b ("realtek: 6.6: refactor mac config and link up for
RTL83xx").
Fixes: https://github.com/openwrt/openwrt/issues/17010
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Tested-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18268
Signed-off-by: Sander Vanheule <sander@svanheule.net>
RTL8261N is used on some Airoha and Realtek devices. Move the driver
from Mediatek to generic so it can be used everywhere.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18163
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The CONFIG_NET_SWITCHDEV option is needed by CONFIG_DSA and some other
options. It is boolean, we have to compile it into the kernel it self.
Activate it for all targets in the generic configuration, it is already
activated for most of them. This allows to install DSA drivers as a
module.
On the ramips/mt7620 target the kernel would grown by 4.5kB.
For some small targets which do not support a DSA switch by default the
option is deactivated.
Link: https://github.com/openwrt/openwrt/pull/17668
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This fixes the handling of some FS copper SFP modules using the RollBall
protocol and needing some extra treatment.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
Some devices have both the color/function and label property defined.
The label can be constructed from the former properties, making it
redundant.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
This makes sgmii work for 1000Base-T SFPs by stupidly adding the sgmii mode
wherever 1000base-x is accepted. No intelligence has been used in the
process. But it "works for me".
There is an obvious need for refactoring this code to make it more obvious
how and why we configure the mac/phy link like we do for different modes.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
These features have been added to the mdio-i2c driver and are now used by
the sfp driver. The support is required for some newer SFPs.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
This driver use "phy-handle" as a placeholder for mac configuration
data. Such handles are therefore required for all ports - even those
connected directly to SFP slots and having a managed property set to
"in-band-status".
The DSA core will register these nodes as if they are real phys. This
prevents later attachment of pluggable phys with errors like
sfp sfp-p8: sfp_add_phy failed: -EBUSY
Replace the virtual SFP slot handles with "pseudo-phy-handle" to keep
the driver logic as-is but hide the node from the DSA core.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The SMBus patch broke the logic and caused the driver to always
register an mdio bus, regardless of the sfp. Restore original
logic.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Re-probing on interface up will register a new duplicate hwmon device. Skip
the hwmon probe if we already have a sensor device.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Fix a typo which resulted in wrong .read hooks and unset .write
hooks. This made I2C_SMBUS_BLOCK_DATA transfers dereference the
NULL .write hook and Oops.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The log noise emmitted by this driver is overwhelming, even for developers
looking at specific issues. Demoting to debug allows individual messages
to be dynamically enabled instead.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Adding a static IPv4 route made the driver repeatedly print
rtl83xx_l3_nexthop_update: Setting up fwding: ip 192.168.1.42, GW mac 0000001b21a7xxxx
Route with id 3 to 192.168.99.0 / 24
rtl83xx_l3_nexthop_update: total packets: 0
Warning: TEMPLATE_FIELD_RANGE_CHK: not configured
These messages are only useful to developers while debugging offloading.
Demote to debug level, which in general is more useful for developers
by allowing precise dynamic control.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/17950
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Both hardware and firmware of these devices appears identical except for the
manufacturers logo and device name. The documented XikeStor SKS8300-8X
installation method is verified to work on the ONTi ONT-S508CL-8S using
Openwrt images made for the XikeStor SKS8300-8X. This includes the OEM boot
loader magic password phrases.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/18071
Signed-off-by: Sander Vanheule <sander@svanheule.net>
By switching to the new RTL8231 driver in commit b7af54d5c1 ("realtek:
Simple conversions to RTL8231 MFD driver"), the bootloader state of the
RTL8231's pins is now maintained. As the bootloader de-asserts the PoE
enable signal, this means PoE output is no longer available.
Add a gpio-hog with high output, restoring the line value from when the
pin was configured (by default) as an input with a pull-up resistor.
This will hard-enable the PoE output, but the individual ports can still
be administratively disabled by realtek-poe or a similar tool.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The JG928A has an RTL8231 on the aux mdio bus. Add it to dts to expose
the GPIO pins used to control and monitor the fan speed. To enable speed
control, add the appropriate kernel driver module to DEVICE_PACKAGES.
Of note, this does not control all fans for the unit. The power supply
fans are not controlled.
Signed-off-by: Evan Jobling <evan@jobling.au>
Link: https://github.com/openwrt/openwrt/pull/17699
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The old RTL8231 driver integrated the MDIO bus access with the GPIO
control ops, making this driver not very portable to newer platforms.
It depended on the SoC ID instead of the compatible to determine the
MDIO access register, further complicating portability.
A new MFD driver is now available, which offers proper pin config as
well as optional LED support, which can work on any (bitbanged) MDIO
bus. Now that all devices have been migrated, we can drop the old code.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
By switching to the new RTL8231 driver in commit b7af54d5c1 ("realtek:
Simple conversions to RTL8231 MFD driver"), the bootloader state of the
RTL8231's pins is now maintained. As the bootloader de-asserts the PoE
enable signal, this means PoE output is no longer available.
Add a gpio-hog with high output, restoring the line value from when the
pin was configured (by default) as an input with a pull-up resistor.
This will hard-enable the PoE output, but the individual ports can still
be administratively disabled by realtek-poe or a similar tool.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Switch the implementation for the RTL8231 GPIO expander to the new
driver.
This allows specifying the GPIO driving the RTL8231's reset as a proper
MDIO reset line, so the gpio-hog can be dropped. Since it was pinned at
a high level, the reset line is actually active-low (i.e. high when not
in reset).
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Update the common external GPIO DTSI file for the DGS-1210 devices to
use an MDIO device on the auxilairy MDIO bus, as the original driver was
doing behind the screen.
Switching to the new driver will allow for full pin-control and will no
longer reset pin config set by the bootloader.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The DTS file for the DGS-1210-10P is slightly different from the other
DGS-1210 devices, in that it didn't specify a gpio-restart node when it
was added. The gpio-restart has been found to work on the DGS-1210-10P
as well, so switch it over to the common definitions.
This converts the last device from the product family to the common
definition for the (external) GPIOs.
Tested-by: Michel Thill <jmthill@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The 'indirect-access-id' property on gpio0 is a remnant from the
original GPIO driver. This property has not been relevant on the SoC's
embedded GPIO controller for a long time, so just drop it.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Change devices with RTL8231 GPIO expander definition that can easily be
translated to the new RTL8231 binding and carry over any gpio-hogs. This
will let them use the new RTL8231 MFD driver, without any functional
changes.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Zyxel GS1900-8 v2 devices have been produced more recently than v1
devices. As there are v1 boards with RTL8380M rev. C SoCs, it can likely
safely be assumed that all v2 devices will also have a recent SoC
revision, supporting the hardware auxiliary MDIO controller.
Make the GS1900-8 v1 use an emulated auxiliary MDIO bus, for backward
compatibility with devices containing an RTL8380M rev. A.
Since the devicetrees are otherwise identical, GS1900-8 v1 devices with
an RTL8380M rev. B or C will also be able to use the (more efficient) v2
image. This includes any currently functioning device with OpenWrt, so
include the old compatible as a supported device for the GS1900-8 v2.
Link: https://github.com/openwrt/openwrt/issues/9534
Signed-off-by: Sander Vanheule <sander@svanheule.net>
The mdio-gpio driver is required to support early revision of RTL8380M
slicon (rev A) where the auxilairy MDIO controller does not function
correctly. Add this driver to the rtl838x kernel so devices with old
SoCs are also able to function correctly.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
In order to be able to define the external GPIO controller on an
emulated MDIO bus, move the controller definition outside of the main
GS1900 include for RTL838x-based devices.
Additionally, a new DTSI is provided defining the RTL8231 on the
emulated MDIO bus.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Some RTL8380M-based devices have been around for a long time and use an
early A revision of the RTL8380M SoC. This revision has an issue with
the auxiliary MDIO controller, causing it to malfunction. This may lead
to device reboots when the controller is used.
Provide a bit-banged MDIO bus, which muxes the auxiliary MDIO pins to
their GPIO function. Although this will result in lower performance,
there should otherwise be no functional differences.
Link: https://github.com/openwrt/openwrt/issues/9534
Signed-off-by: Sander Vanheule <sander@svanheule.net>
As the bootloader is reconfiguring the RTL8231 on these devices anyway,
no pin state can be maintained over warm reboots. This results in for
example the PoE disable pin always being asserted by the bootloader.
Define the GPIO line linked to the RTL8231's reset so the MDIO subsystem
will also reset the expander on boot and ensure the line in the correct
state.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Supported devices are listed in the metadata as the first part of the
DTS compatible. This normally follows the format "vendor,device".
When updating the device name of the 180W 1920-8G PoE an underscore was
used, instead of a comma, to join the vendor and device name. This will
lead to warnings for users wanting to sysupgrade a device with an older
compatible, as the device's info does not match the one the metadata.
Fixes: 987c96e889 ("realtek: rename hpe,1920-8g-poe to match hardware")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
XikeStor (Seeker) SKS8300-8X is a 8 ports Multi-Gig switch, based on
RTL9303.
Specification:
- SoC : Realtek RTL9303
- RAM : DDR3 512 MiB
- Flash : SPI-NOR 32 MiB (Winbond W25Q256JVFIQ)
- Ethernet : 8x 1/2.5/10 Gbps (SFP+)
- LEDs/Keys (GPIO): 1x/1x
- UART : "Console" port on the front panel
- type : RS-232C
- connector : RJ-45
- settings : 9600n8
- Watchdog : Diodes PT7A7514WE
- Power : 12 VDC, 2 A
Flash instruction using initramfs image:
1. Prepare TFTP server with an IP address "192.168.2.36"
2. Connect your PC to Port1 on SKS8300-8X
3. Power on SKS8300-8X and interrupt by Ctrl + B
4. Login to the vendor CLI by Ctrl + F and "diagshell_unipoe_env"
5. Login to the U-Boot CLI by "debug_unish_env" command
6. Enable Port1 with the following commands
rtk 10g 0 fiber1g (or fiber10g if 10GBase-*R)
rtk ext-devInit 0
rtk ext-pinSet 2 0
Note: the last command sets tx-disable to low
7. Download initramfs image from TFTP server
tftpboot 0x82000000 <image name>
8. Boot with the downloaded image
bootm
9. On the initramfs image, backup the stock firmware if needed
10. Upload (or download) sysupgrade image to the device
11. Erase "firmware" partition to cleanup JFFS2 of stock FW
mtd erase firmware
12. Perform sysupgrade with the sysupgrade image
13. Wait ~120 sec to complete flashing
Notes:
- A kernel binary "nos.img" needs to be stored into JFFS2 filesystem
using 4KiB erase block instead of 64KiB.
- PT7A7514WE is handled by hardware-assited system LED output
(blinking).
- Some Japanese users asked to XikeStor about maximum power limit of
SFP+ ports and got approximate criteria:
- per port : <= 2.9 W
- total (8 ports): <= 15.8 W
MAC addresses:
eth0 : 84:E5:D8:xx:xx:37 (board-info (stock:"flash_raw"), 0x218 (hex))
(ports): 84:E5:D8:xx:xx:36 (board-info (stock:"flash_raw"), 0x1f1 (hex))
Reverting to stock firmware:
1. Prepare OpenWrt SDK to use the mkfs.jffs2 tool contained in it
Note: the official mkfs.jffs2 tool in mtd-utils doesn't support 4KiB
erase size and not usable for SKS8300-8X
2. Create a directory for working
3. Download official firmware for SKS8300-8X from XikeStor's official
website
4. Rename the downloaded firmware to "nos.img" and place it to the
working directory
5. Create a JFFS2 filesystem binary with the working directory
/path/to/mkfs.jffs2 -p -b -U -v -e 4KiB -x lzma \
-o nos.img.jffs2 -d /path/to/working/dir/
6. Upload the created JFFS2 filesystem binary to the device
7. Erase the "firmware" partition
mtd erase firmware
8. Write the JFFS2 filesystem binary to the "firmware" partition
mtd write /path/to/nos.img.jffs2 firmware
9. After writing, reboot the device by power cycle
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17593
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Change some debugging messages of RTL930x SerDes in the PHY driver to
pr_debug() to suppress log messages on the console.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17593
Signed-off-by: Sander Vanheule <sander@svanheule.net>
