mediatek: add support for Zbtlink ZBT-Z8102AX v2
Specifications: SoC: MediaTek MT7981B RAM: 1024MiB Flash: SPI-NAND 128 MiB Switch: 1 WAN, 4 LAN (Gigabit) USB: two M.2 slots for 5G modems via USB 3.0 hub, external USB 3.0 port Buttons: Reset, Mesh Power: DC 12V 1A WiFi: MT7976CN UART: 115200n8 UART Layout: VCC-RX-TX-GND Installation: 1. Power down the router and hold in the Reset button. 2. While holding in the button power up the router again. 3. Hold the button in for 10 seconds and then release. 4. Use your browser to go to 192.168.1.1 5. If you see a GUI that is for flashing firmware then you have the V2 model. If there is no GUI and the router continues to boot up normally you have the V1 model. 6. Now use the V2 sysugrade file. Note: Recovery GUI it can be used to recover from an incorrect firmware flash. Based on patches adding support for this device by Yannick Chabanois (openmptcprouter) and Dairyman (ofmodemsandmen) Signed-off-by: Marius Durbaca <mariusd84@gmail.com> Link: https://github.com/openwrt/openwrt/pull/18514 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Marius Durbaca
Hauke Mehrtens
parent
143cfd6113
commit
c908fc7d95
5 changed files with 358 additions and 1 deletions
337
target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax-v2.dts
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337
target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8102ax-v2.dts
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@ -0,0 +1,337 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "mt7981b.dtsi"
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/ {
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model = "ZBT Z8102AX V2";
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compatible = "zbtlink,zbt-z8102ax-v2", "mediatek,mt7981";
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aliases {
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serial0 = &uart0;
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led-boot = &led_status_red;
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led-failsafe = &led_status_red;
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led-running = &led_status_green;
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led-upgrade = &led_status_green;
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label-mac-device = &gmac0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
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};
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status_red: red {
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gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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};
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led_status_green: green {
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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};
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led_status_blue: blue {
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gpios = <&pio 11 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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};
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led_status_5g1: 5g1 {
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gpios = <&pio 8 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_USB;
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function-enumerator = <0>;
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};
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led_status_5g2: 5g2 {
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gpios = <&pio 13 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_USB;
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function-enumerator = <1>;
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};
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};
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watchdog {
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compatible = "linux,wdt-gpio";
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gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
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hw_algo = "toggle";
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hw_margin_ms = <1000>;
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};
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gpio-export {
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compatible = "gpio-export";
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#size-cells = <0>;
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pcie {
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gpio-export,name = "pcie_power";
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gpio-export,output = <1>;
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gpios = <&pio 3 GPIO_ACTIVE_HIGH>;
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};
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5g1 {
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gpio-export,name = "5g1";
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gpio-export,output = <1>;
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gpios = <&pio 4 GPIO_ACTIVE_HIGH>;
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};
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5g2 {
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gpio-export,name = "5g2";
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gpio-export,output = <1>;
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gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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};
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sim1 {
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gpio-export,name = "sim1";
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gpio-export,output = <0>;
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gpios = <&pio 6 GPIO_ACTIVE_LOW>;
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};
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sim2 {
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gpio-export,name = "sim2";
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gpio-export,output = <0>;
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gpios = <&pio 7 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "gmii";
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phy-handle = <&int_gbe_phy>;
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_02a>;
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};
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};
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&mdio_bus {
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand@0 {
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compatible = "spi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-buswidth = <4>;
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spi-rx-buswidth = <4>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bl2";
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reg = <0x0000000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x0100000 0x0080000>;
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};
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factory: partition@180000 {
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label = "Factory";
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reg = <0x0180000 0x0200000>;
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read-only;
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};
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partition@380000 {
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label = "FIP";
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reg = <0x0380000 0x0200000>;
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read-only;
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};
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nand_rootfs: partition@580000 {
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label = "ubi";
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reg = <0x0580000 0x7220000>;
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};
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_004>;
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_004>;
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_004>;
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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nvmem-cell-names = "mac-address";
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nvmem-cells = <&macaddr_factory_004>;
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&pio {
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gpio-line-names =
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"wps",
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"reset",
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"watchdog",
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"pcie",
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"5g1",
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"5g2",
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"sim1",
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"sim2",
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"5g1_status",
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"red_status",
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"green_status",
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"blue_status",
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"",
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"5g2_status";
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>; /* bias-disable */
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>; /* bias-disable */
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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&wifi {
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status = "okay";
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nvmem-cells = <&eeprom_factory>;
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nvmem-cell-names = "eeprom";
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_004: macaddr@004 {
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reg = <0x004 0x6>;
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};
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macaddr_factory_02a: macaddr@02a {
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reg = <0x02a 0x6>;
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};
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eeprom_factory: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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};
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@ -57,6 +57,7 @@ mediatek_setup_interfaces()
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ruijie,rg-x60-pro|\
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unielec,u7981-01*|\
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zbtlink,zbt-z8102ax|\
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zbtlink,zbt-z8102ax-v2|\
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zyxel,ex5601-t0-stock|\
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zyxel,ex5601-t0-ubootmod)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
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@ -5,7 +5,8 @@ board_config_update
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board=$(board_name)
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case "$board" in
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zbtlink,zbt-z8102ax)
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zbtlink,zbt-z8102ax|\
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zbtlink,zbt-z8102ax-v2)
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ucidef_add_gpio_switch "5g1" "Power 1st modem" "5g1" "1"
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ucidef_add_gpio_switch "5g2" "Power 2nd modem" "5g2" "1"
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ucidef_add_gpio_switch "pcie" "Power PCIe port" "pcie" "1"
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@ -185,6 +185,7 @@ case "$board" in
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routerich,ax3000|\
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routerich,ax3000-ubootmod|\
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zbtlink,zbt-z8102ax|\
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zbtlink,zbt-z8102ax-v2|\
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zbtlink,zbt-z8103ax|\
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zyxel,ex5601-t0-stock|\
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zyxel,ex5601-t0-ubootmod)
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@ -2015,6 +2015,23 @@ define Device/zbtlink_zbt-z8102ax
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endef
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TARGET_DEVICES += zbtlink_zbt-z8102ax
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define Device/zbtlink_zbt-z8102ax-v2
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DEVICE_VENDOR := Zbtlink
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DEVICE_MODEL := ZBT-Z8102AX-V2
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DEVICE_DTS := mt7981b-zbtlink-zbt-z8102ax-v2
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DEVICE_DTS_DIR := ../dts
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DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3 kmod-usb-net-qmi-wwan kmod-usb-serial-option
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KERNEL_IN_UBI := 1
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UBINIZE_OPTS := -E 5
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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IMAGE_SIZE := 65536k
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IMAGES += factory.bin
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IMAGE/factory.bin := append-ubi | check-size $$(IMAGE_SIZE)
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IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
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endef
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TARGET_DEVICES += zbtlink_zbt-z8102ax-v2
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define Device/zbtlink_zbt-z8103ax
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DEVICE_VENDOR := Zbtlink
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DEVICE_MODEL := ZBT-Z8103AX
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