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mvebu: add support for Check Point V-80

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Check Point V-80 (Quantum Spark 1550 Appliance) is an Appliance, based
on Armada 7040 (88F7040).

Specification:

- SoC             : Marvell Armada 7040 (88F7040)
- RAM             : DDR4 2 GiB (4x Nanya NT5AD512M8D3-HR)
- Flash           : eMMC 4 GiB (Toshiba THGBMNG5D1LBAIL)
- Ethernet        : 6x 10/100/1000 Mbps
  - LAN 1-5       : Marvell 88E6352
  - WAN           : Marvell 88E1512
- LEDs/Keys (GPIO): 6x/1x
- UART            : "CONSOLE" port (USB 1.1 Type-C)
  - chip          : Silicon Labs CP2102N
  - port          : ttyS0
  - settings      : 115200bps 8n1
- HW Monitoring   : 2x nuvoTon NCT7802Y
- USB             : USB 3.0 Type-A
- Power           : 12 VDC, 3.3 A
  - plug          : DC Plug 2.5/5.5 mm (inner/outer)

Flash instruction (common):

1. Boot V-80 normally
2. Login to the vendor CLI (default: admin/admin) and login to the Linux
   CLI by `expert` command
3. Update U-Boot environment variables by the following commands

   fw_setenv bootcmd_ow_usb 'usb start; load usb 0:1 ${loadaddr} boot.scr && source ${loadaddr}'
   fw_setenv bootcmd_ow_emmc 'run set_mmc_internal; mmc read ${loadaddr} ${prim_header_mmc_blk} 4 && source ${loadaddr}'
   fw_setenv bootcmd 'run bootcmd_ow_usb; run bootcmd_ow_emmc; run bootcmd_part${activePartition};'

   Attention: don't forget single quatations of values to prevent
              expansion of each variables

4. Turn off the device

Flash instruction (USB-boot):

1. Burn (squashfs|ext4)-sdcard.img.gz to USB storage
2. Connect that storage to the USB 3.0 port on V-80
3. Turn on V-80 and it will be booted with OpenWrt in that USB storage

Flash instruction (eMMC-boot):

1. Copy initramfs image, dtb and bootsctipt to the USB storage with
   renaming

   initramfs.bin -------> Image
   dtb -----------------> armada-7040-v-80.dtb
   bootscript (.scr) ---> boot.scr

2. Connect that storage to the USB 3.0 port on V-80
3. Turn on V-80 and it will be booted with OpenWrt initramfs image in
   that USB storage
4. Upload (squashfs|ext4)-sysupgrade.gz to V-80
5. Perform sysupgrade with the uploaded image
6. Wait ~100 seconds to complete flashing

Reverting to stock firmware:

1. Turn on V-80 and interrupt booting by Ctrl + C
2. Select "4. Restore to Factory Defaults (local)"
3. Wait ~180 seconds to complete restoring and rebooting

Notes:

- V-80 has some HW versions. Internal MicroSD card slot and mPCIe slot
  is available on some HW versions, but not on the other HW versions.

  confirmed (MicroSD/mPCIe slots):

  - 1.0.1: unavailable
  - 1.0.3: available

- The partition table in the internal eMMC has single partition, but
  "blkdevparts=" parameter will be passed from the bootloader and that
  definition will be used instead.

MAC addresses:

LAN: 00:1C:7F:xx:xx:4B (mmcblk1boot0, ethaddr (text))
WAN: 00:1C:7F:xx:xx:4A (mmcblk1boot0, eth1addr (text))

Tested-by: Yanase Yuki <dev@zpc.st>
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16904
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
INAGAKI Hiroshi 2024-04-07 11:53:17 +09:00 committed by Hauke Mehrtens
parent 92a5a4935e
commit 35c851b813
6 changed files with 986 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network
View file

@ -10,6 +10,9 @@ board_config_update
board=$(board_name)
case "$board" in
checkpoint,v-80)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" "eth1"
;;
globalscale,mochabin)
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" "eth0 eth2"
;;

62
target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh
View file

@ -9,6 +9,35 @@ REQUIRE_IMAGE_METADATA=1
platform_check_image() {
case "$(board_name)" in
checkpoint,v-80)
local root="$(cmdline_get_var root)"
case "$root" in
PARTUUID=????????-02) # USB or SD
legacy_sdcard_check_image "$1"
;;
""|\
/dev/mmcblk1p3) # initramfs or eMMC
# check sysupgrade tar image
local gz="$(identify_if_gzip "$1")"
tar t${gz}f "$1" | grep -q "sysupgrade-.*/CONTROL" || {
v "image is not a valid tar file for sysupgrade on eMMC!"
return 1
}
# check availability of partitions
local part_name part_dev
for part_name in "kernel-1" "dtb-1" "rootfs-1"; do
part_dev="$(find_mmc_part $part_name mmcblk1)"
[ -n "$part_dev" ] || {
v "eMMC partition \"$part_name\" not found!"
return 1
}
done
;;
*)
return 1
;;
esac
;;
globalscale,mochabin|\
iei,puzzle-m901|\
iei,puzzle-m902|\
@ -26,6 +55,21 @@ platform_check_image() {
platform_do_upgrade() {
case "$(board_name)" in
checkpoint,v-80)
local root="$(cmdline_get_var root)"
case "$root" in
PARTUUID=????????-02) # USB or SD
legacy_sdcard_do_upgrade "$1"
;;
*) # initramfs or eMMC
CI_ROOTDEV="mmcblk1"
CI_KERNPART="kernel-1"
CI_ROOTPART="rootfs-1"
CI_DTBPART="dtb-1"
emmc_do_upgrade "$1"
;;
esac
;;
iei,puzzle-m901|\
iei,puzzle-m902)
platform_do_upgrade_emmc "$1"
@ -47,6 +91,24 @@ platform_do_upgrade() {
}
platform_copy_config() {
case "$(board_name)" in
checkpoint,v-80)
local root="$(cmdline_get_var root)"
case "$root" in
PARTUUID=????????-02) # USB or SD
legacy_sdcard_copy_config
;;
*) # initramfs or eMMC
mkdir /tmp/new_root
if ! mount -t ext4 /dev/mmcblk1p3 /tmp/new_root 2>/dev/null; then
emmc_copy_config
else
v "new rootfs is ext4, saving configurations..."
cp "$UPGRADE_BACKUP" "/tmp/new_root/$BACKUP_FILE"
umount /tmp/new_root
fi
;;
esac
;;
globalscale,mochabin|\
iei,puzzle-m901|\
iei,puzzle-m902|\

425
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-7040-v-80.dts Normal file
View file

@ -0,0 +1,425 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/common.h>
#include "armada-7040.dtsi"
/ {
model = "Check Point V-80";
compatible = "checkpoint,v-80", "marvell,armada7040",
"marvell,armada-ap806-quad", "marvell,armada-ap806";
aliases {
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
mmc0 = &ap_sdhci0;
mmc1 = &cp0_sdhci0;
led-boot = &led_power_blue;
led-failsafe = &led_power_red;
led-running = &led_power_blue;
led-upgrade = &led_power_blue;
label-mac-device = &cp0_eth1;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&pmx_gpio_keys_pins>;
pinctrl-names = "default";
button-reset {
label = "reset";
gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_gpio_leds_pins>;
pinctrl-names = "default";
/* populated but no hole on the case */
led-0 {
gpios = <&cp0_gpio1 13 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
};
led_power_red: led-1 {
gpios = <&cp0_gpio1 23 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
};
led-2 {
gpios = <&cp0_gpio1 26 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN_ONLINE;
};
/* populated but no hole on the case */
led-3 {
gpios = <&cp0_gpio2 1 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN;
};
led_power_blue: led-4 {
gpios = <&cp0_gpio2 2 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
};
led-5 {
gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = "management";
};
led-6 {
gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = "management";
};
led-7 {
gpios = <&cp0_gpio2 22 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN_ONLINE;
};
};
regulator-usb-vbus {
compatible = "regulator-fixed";
pinctrl-0 = <&pmx_reg_usb_vbus_pins>;
pinctrl-names = "default";
regulator-name = "usb-vbus";
gpios = <&cp0_gpio1 24 GPIO_ACTIVE_HIGH>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
};
};
/* USB Type-C UART console */
&uart0 {
status = "okay";
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
/*
* internal MicroSD slot
* (Note: not populated on some HW versions)
*/
&ap_sdhci0 {
status = "okay";
pinctrl-0 = <&pmx_ap_sdhci0_pins>;
pinctrl-names = "default";
bus-width = <4>;
cd-gpios = <&cp0_gpio1 6 GPIO_ACTIVE_LOW>;
/*
* Not stable in HS modes - phy needs "more calibration", so add
* the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
*/
marvell,xenon-phy-slow-mode;
no-1-8-v;
};
&cp0_pinctrl {
pinctrl-0 = <&pmx_board_id_pins>;
pinctrl-names = "default";
pmx_ap_sdhci0_pins: ap-sdhci0-pins {
marvell,pins = "mpp6";
marvell,function = "gpio";
};
pmx_cp0_mdio_pins: cp0-mdio-pins {
marvell,pins = "mpp27", "mpp28";
marvell,function = "ge";
};
pmx_cp0_spi1_pins: cp0-spi1-pins {
marvell,pins = "mpp47", "mpp48", "mpp49", "mpp50";
marvell,function = "spi1";
};
pmx_cp0_i2c0_pins: cp0-i2c0-pins {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
pmx_cp0_i2c1_pins: cp0-i2c1-pins {
marvell,pins = "mpp2", "mpp3";
marvell,function = "i2c1";
};
pmx_cp0_sdhci0_pins: cp0-sdhci0-pins {
marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59", "mpp60", "mpp61";
marvell,function = "sdio";
};
pmx_gpio_keys_pins: gpio-keys-pins {
marvell,pins = "mpp12";
marvell,function = "gpio";
};
pmx_gpio_leds_pins: gpio-leds-pins {
marvell,pins = "mpp13", "mpp23", "mpp26", "mpp33", "mpp34", "mpp51",
"mpp52", "mpp54";
marvell,function = "gpio";
};
pmx_reg_usb_vbus_pins: reg-usb-vbus-pins {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
pmx_board_id_pins: board-id-pins {
marvell,pins = "mpp4", "mpp10", "mpp62";
marvell,function = "gpio";
};
pmx_eeprom_wp_pins: eeprom-wp-pins {
marvell,pins = "mpp55";
marvell,function = "gpio";
};
};
&cp0_mdio {
status = "okay";
pinctrl-0 = <&pmx_cp0_mdio_pins>;
pinctrl-names = "default";
/* Marvell 88E6352 */
switch@0 {
compatible = "marvell,mv88e6085";
reg = <0x0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
swport0: port@0 {
reg = <0x0>;
label = "lan5";
phy-handle = <&swphy0>;
};
swport1: port@1 {
reg = <0x1>;
label = "lan4";
phy-handle = <&swphy1>;
};
swport2: port@2 {
reg = <0x2>;
label = "lan3";
phy-handle = <&swphy2>;
};
swport3: port@3 {
reg = <0x3>;
label = "lan2";
phy-handle = <&swphy3>;
};
swport4: port@4 {
reg = <0x4>;
label = "lan1";
phy-handle = <&swphy4>;
};
port@5 {
reg = <0x5>;
ethernet = <&cp0_eth0>;
phy-connection-type = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
swphy0: switch-phy@0 {
reg = <0x0>;
};
swphy1: switch-phy@1 {
reg = <0x1>;
};
swphy2: switch-phy@2 {
reg = <0x2>;
};
swphy3: switch-phy@3 {
reg = <0x3>;
};
swphy4: switch-phy@4 {
reg = <0x4>;
};
};
};
/* Marvell 88E1512 */
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-id0141,0dd1",
"ethernet-phy-ieee802.3-c22";
reg = <0x1>;
/*
* LED[0] (Green): LINK/ACT
* LED[1] (Amber): SPEED 100/1000M
*/
marvell,reg-init = <3 16 0 0x61>;
};
};
&cp0_ethernet {
status = "okay";
};
/* LAN1-5 (Switch) */
&cp0_eth0 {
status = "okay";
phy-connection-type = "sgmii";
phys = <&cp0_comphy2 0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
/* "WAN" */
&cp0_eth1 {
status = "okay";
phy-connection-type = "sgmii";
phy-handle = <&ethphy1>;
phys = <&cp0_comphy0 1>;
};
&cp0_gpio1 {
board-id-1 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
input;
};
board-id-0 {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
input;
};
};
&cp0_gpio2 {
board-id-2 {
gpio-hog;
gpios = <30 GPIO_ACTIVE_HIGH>;
input;
};
};
/* 2x NCT7802Y, EEPROM */
&cp0_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_i2c0_pins>;
clock-frequency = <100000>;
hwmon@28 {
compatible = "nuvoton,nct7802";
reg = <0x28>;
};
hwmon@29 {
compatible = "nuvoton,nct7802";
reg = <0x29>;
};
/* Giantec GT24C04A */
eeprom@54 {
compatible = "atmel,24c04";
pinctrl-0 = <&pmx_eeprom_wp_pins>;
pinctrl-names = "default";
reg = <0x54>;
wp-gpios = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>;
read-only;
};
};
/* RTC */
&cp0_i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_i2c1_pins>;
clock-frequency = <100000>;
rtc@68 {
compatible = "dallas,ds1337";
reg = <0x68>;
};
};
/* eMMC */
&cp0_sdhci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_sdhci0_pins>;
bus-width = <4>;
non-removable;
};
/*
* mPCIe slot
* (Note: not populated on some HW versions)
*/
&cp0_pcie2 {
status = "okay";
phys = <&cp0_comphy5 2>;
phy-names = "cp0-pcie2-x1-phy";
};
&cp0_utmi {
status = "okay";
};
/* USB 3.0 Type-A */
&cp0_usb3_0 {
status = "okay";
dr_mode = "host";
phys = <&cp0_comphy1 0>, <&cp0_utmi0>;
phy-names = "cp0-usb3h0-comphy", "utmi";
};

425
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-v-80.dts Normal file
View file

@ -0,0 +1,425 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/common.h>
#include "armada-7040.dtsi"
/ {
model = "Check Point V-80";
compatible = "checkpoint,v-80", "marvell,armada7040",
"marvell,armada-ap806-quad", "marvell,armada-ap806";
aliases {
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
mmc0 = &ap_sdhci0;
mmc1 = &cp0_sdhci0;
led-boot = &led_power_blue;
led-failsafe = &led_power_red;
led-running = &led_power_blue;
led-upgrade = &led_power_blue;
label-mac-device = &cp0_eth1;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&pmx_gpio_keys_pins>;
pinctrl-names = "default";
button-reset {
label = "reset";
gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_gpio_leds_pins>;
pinctrl-names = "default";
/* populated but no hole on the case */
led-0 {
gpios = <&cp0_gpio1 13 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
};
led_power_red: led-1 {
gpios = <&cp0_gpio1 23 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
};
led-2 {
gpios = <&cp0_gpio1 26 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN_ONLINE;
};
/* populated but no hole on the case */
led-3 {
gpios = <&cp0_gpio2 1 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN;
};
led_power_blue: led-4 {
gpios = <&cp0_gpio2 2 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
};
led-5 {
gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = "management";
};
led-6 {
gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = "management";
};
led-7 {
gpios = <&cp0_gpio2 22 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN_ONLINE;
};
};
regulator-usb-vbus {
compatible = "regulator-fixed";
pinctrl-0 = <&pmx_reg_usb_vbus_pins>;
pinctrl-names = "default";
regulator-name = "usb-vbus";
gpios = <&cp0_gpio1 24 GPIO_ACTIVE_HIGH>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
};
};
/* USB Type-C UART console */
&uart0 {
status = "okay";
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
/*
* internal MicroSD slot
* (Note: not populated on some HW versions)
*/
&ap_sdhci0 {
status = "okay";
pinctrl-0 = <&pmx_ap_sdhci0_pins>;
pinctrl-names = "default";
bus-width = <4>;
cd-gpios = <&cp0_gpio1 6 GPIO_ACTIVE_LOW>;
/*
* Not stable in HS modes - phy needs "more calibration", so add
* the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
*/
marvell,xenon-phy-slow-mode;
no-1-8-v;
};
&cp0_pinctrl {
pinctrl-0 = <&pmx_board_id_pins>;
pinctrl-names = "default";
pmx_ap_sdhci0_pins: ap-sdhci0-pins {
marvell,pins = "mpp6";
marvell,function = "gpio";
};
pmx_cp0_mdio_pins: cp0-mdio-pins {
marvell,pins = "mpp27", "mpp28";
marvell,function = "ge";
};
pmx_cp0_spi1_pins: cp0-spi1-pins {
marvell,pins = "mpp47", "mpp48", "mpp49", "mpp50";
marvell,function = "spi1";
};
pmx_cp0_i2c0_pins: cp0-i2c0-pins {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
pmx_cp0_i2c1_pins: cp0-i2c1-pins {
marvell,pins = "mpp2", "mpp3";
marvell,function = "i2c1";
};
pmx_cp0_sdhci0_pins: cp0-sdhci0-pins {
marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59", "mpp60", "mpp61";
marvell,function = "sdio";
};
pmx_gpio_keys_pins: gpio-keys-pins {
marvell,pins = "mpp12";
marvell,function = "gpio";
};
pmx_gpio_leds_pins: gpio-leds-pins {
marvell,pins = "mpp13", "mpp23", "mpp26", "mpp33", "mpp34", "mpp51",
"mpp52", "mpp54";
marvell,function = "gpio";
};
pmx_reg_usb_vbus_pins: reg-usb-vbus-pins {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
pmx_board_id_pins: board-id-pins {
marvell,pins = "mpp4", "mpp10", "mpp62";
marvell,function = "gpio";
};
pmx_eeprom_wp_pins: eeprom-wp-pins {
marvell,pins = "mpp55";
marvell,function = "gpio";
};
};
&cp0_mdio {
status = "okay";
pinctrl-0 = <&pmx_cp0_mdio_pins>;
pinctrl-names = "default";
/* Marvell 88E6352 */
switch@0 {
compatible = "marvell,mv88e6085";
reg = <0x0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
swport0: port@0 {
reg = <0x0>;
label = "lan5";
phy-handle = <&swphy0>;
};
swport1: port@1 {
reg = <0x1>;
label = "lan4";
phy-handle = <&swphy1>;
};
swport2: port@2 {
reg = <0x2>;
label = "lan3";
phy-handle = <&swphy2>;
};
swport3: port@3 {
reg = <0x3>;
label = "lan2";
phy-handle = <&swphy3>;
};
swport4: port@4 {
reg = <0x4>;
label = "lan1";
phy-handle = <&swphy4>;
};
port@5 {
reg = <0x5>;
ethernet = <&cp0_eth0>;
phy-connection-type = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
swphy0: switch-phy@0 {
reg = <0x0>;
};
swphy1: switch-phy@1 {
reg = <0x1>;
};
swphy2: switch-phy@2 {
reg = <0x2>;
};
swphy3: switch-phy@3 {
reg = <0x3>;
};
swphy4: switch-phy@4 {
reg = <0x4>;
};
};
};
/* Marvell 88E1512 */
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-id0141,0dd1",
"ethernet-phy-ieee802.3-c22";
reg = <0x1>;
/*
* LED[0] (Green): LINK/ACT
* LED[1] (Amber): SPEED 100/1000M
*/
marvell,reg-init = <3 16 0 0x61>;
};
};
&cp0_ethernet {
status = "okay";
};
/* LAN1-5 (Switch) */
&cp0_eth0 {
status = "okay";
phy-connection-type = "sgmii";
phys = <&cp0_comphy2 0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
/* "WAN" */
&cp0_eth1 {
status = "okay";
phy-connection-type = "sgmii";
phy-handle = <&ethphy1>;
phys = <&cp0_comphy0 1>;
};
&cp0_gpio1 {
board-id-1 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
input;
};
board-id-0 {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
input;
};
};
&cp0_gpio2 {
board-id-2 {
gpio-hog;
gpios = <30 GPIO_ACTIVE_HIGH>;
input;
};
};
/* 2x NCT7802Y, EEPROM */
&cp0_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_i2c0_pins>;
clock-frequency = <100000>;
hwmon@28 {
compatible = "nuvoton,nct7802";
reg = <0x28>;
};
hwmon@29 {
compatible = "nuvoton,nct7802";
reg = <0x29>;
};
/* Giantec GT24C04A */
eeprom@54 {
compatible = "atmel,24c04";
pinctrl-0 = <&pmx_eeprom_wp_pins>;
pinctrl-names = "default";
reg = <0x54>;
wp-gpios = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>;
read-only;
};
};
/* RTC */
&cp0_i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_i2c1_pins>;
clock-frequency = <100000>;
rtc@68 {
compatible = "dallas,ds1337";
reg = <0x68>;
};
};
/* eMMC */
&cp0_sdhci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_sdhci0_pins>;
bus-width = <4>;
non-removable;
};
/*
* mPCIe slot
* (Note: not populated on some HW versions)
*/
&cp0_pcie2 {
status = "okay";
phys = <&cp0_comphy5 2>;
phy-names = "cp0-pcie2-x1-phy";
};
&cp0_utmi {
status = "okay";
};
/* USB 3.0 Type-A */
&cp0_usb3_0 {
status = "okay";
dr_mode = "host";
phys = <&cp0_comphy1 0>, <&cp0_utmi0>;
phy-names = "cp0-usb3h0-comphy", "utmi";
};

22
target/linux/mvebu/image/cortexa72.mk
View file

@ -1,3 +1,7 @@
define Build/append-bootscript
cat $@-boot.scr >> $@
endef
define Device/FitImage
KERNEL_SUFFIX := -uImage.itb
KERNEL = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
@ -11,6 +15,24 @@ define Device/UbiFit
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/checkpoint_v-80
$(call Device/Default-arm64)
DEVICE_VENDOR := Check Point
DEVICE_MODEL := V-80
SOC := armada-7040
BOOT_SCRIPT := v-80
IMAGES += sysupgrade.gz
IMAGE/sysupgrade.gz := boot-scr eMMC | append-bootscript | pad-to 2048 | \
append-kernel | \
sysupgrade-tar kernel=$$$$@ dtb=$$(KDIR)/image-$$(DEVICE_DTS).dtb | \
gzip | append-metadata
ARTIFACTS := initramfs.dtb initramfs.scr
ARTIFACT/initramfs.dtb := append-dtb
ARTIFACT/initramfs.scr := boot-scr INIT | append-bootscript
DEVICE_PACKAGES := kmod-dsa-mv88e6xxx kmod-hwmon-nct7802 kmod-rtc-ds1307
endef
TARGET_DEVICES += checkpoint_v-80
define Device/globalscale_mochabin
$(call Device/Default-arm64)
DEVICE_VENDOR := Globalscale

49
target/linux/mvebu/image/v-80.bootscript Normal file
View file

@ -0,0 +1,49 @@
# Bootscript for Check Point V-80 (eMMC/USB/SD)
setenv ow_root "@ROOT@-02"
# ROOT is "eMMC"
if test "${ow_root}" = "eMMC-02"; then
mmc read ${fdt_addr_r} ${prim_dtb_dest_mmc_blk} ${dtb_partition_block_count}
mmc read ${kernel_addr_r} 0x5004 ${kernel_partition_block_count}
setenv ow_root "/dev/mmcblk1p3"
# ROOT is other value (USB/SD)
else
# ROOT is "INIT", try USB storage (initramfs)
if test "${ow_root}" = "INIT-02"; then
setenv devtype usb
setenv ow_root
else
# try USB storage
part uuid usb 0:2 uuid
if test -n "${uuid}" -a "${uuid}" = "${ow_root}"; then
setenv devtype usb
fi
set uuid
# try SD card
test -z "${devtype}" && part uuid mmc 0:2 uuid
if test -n "${uuid}" -a "${uuid}" = "${ow_root}"; then
setenv devtype mmc
fi
if test -z "${devtype}"; then
echo "Cannot find any boot device!"
exit
fi
setenv ow_root "PARTUUID=${ow_root}"
fi
load ${devtype} 0:1 ${fdt_addr_r} @DTB@.dtb
load ${devtype} 0:1 ${kernel_addr_r} Image
fi
# remove "quiet" option from bootargs
setenv cp_quiet
# set bootargs with "blkdevparts" option
run set_bootargs_vx
test -n "${ow_root}" && setenv bootargs "${bootargs} root=${ow_root} rw rootwait"
booti ${kernel_addr_r} - ${fdt_addr_r}