Tien Fong Chee 4720b83d2c arm: socfpga: arria10: Enable double peripheral RBF configuration ... Double peripheral RBF configuration are needed on some devices or boards to stabilize the IO configuration system. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>		2021-12-17 12:58:01 +08:00
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include/mach	arm: socfpga: arria10: Enable double peripheral RBF configuration	2021-12-17 12:58:01 +08:00
board.c	arm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux function	2021-08-24 14:29:50 +08:00
clock_manager.c	arm: socfpga: Changed to store QSPI reference clock in kHz	2021-04-08 17:29:12 +08:00
clock_manager_agilex.c	arm: socfpga: Move Stratix10 and Agilex clock manager common code	2021-04-08 17:29:12 +08:00
clock_manager_arria10.c
clock_manager_gen5.c
clock_manager_n5x.c	arm: socfpga: Add clock manager for Intel N5X device	2021-08-25 13:32:50 +08:00
clock_manager_s10.c	arm: socfpga: Move Stratix10 and Agilex clock manager common code	2021-04-08 17:29:12 +08:00
firewall.c
fpga_manager.c
freeze_controller.c
Kconfig	lib: Drop SHA512_ALGO in lieu of SHA512	2021-09-08 16:11:46 -04:00
lowlevel_init_soc64.S
mailbox_s10.c	arm: socfpga: Changed to store QSPI reference clock in kHz	2021-04-08 17:29:12 +08:00
Makefile	arm: socfpga: Enable Intel N5X device build	2021-08-25 15:26:38 +08:00
misc.c	arm: socfpga: Get clock manager base address for Intel N5X device	2021-08-25 12:54:37 +08:00
misc_arria10.c	arm: socfpga: arria10: Enable double peripheral RBF configuration	2021-12-17 12:58:01 +08:00
misc_gen5.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
misc_soc64.c	arm: socfpga: Changed misc_s10.c to misc_soc64.c	2021-08-25 13:37:01 +08:00
mmu-arm64_s10.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
pinmux_arria10.c
qts-filter-a10.sh
qts-filter.sh
reset_manager_arria10.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
reset_manager_gen5.c
reset_manager_s10.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
scan_manager.c
secure_reg_helper.c	arm: socfpga: Add secure register access helper functions for SoC 64bits	2021-01-15 17:48:36 +08:00
secure_vab.c	arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)	2021-03-08 10:59:10 +08:00
smc_api.c	arm: socfpga: smc: Add function to get usercode	2021-04-08 17:29:13 +08:00
spl_a10.c	arm: socfpga: arria10: Enable double peripheral RBF configuration	2021-12-17 12:58:01 +08:00
spl_agilex.c	arm: socfpga: Move Stratix10 and Agilex SPL common code	2021-04-08 17:29:11 +08:00
spl_gen5.c	mmc: Rename MMC_SUPPORT to MMC	2021-09-04 11:42:41 -04:00
spl_n5x.c	arm: socfpga: Add SPL for Intel N5X device	2021-08-25 14:43:29 +08:00
spl_s10.c	arm: socfpga: Move Stratix10 and Agilex SPL common code	2021-04-08 17:29:11 +08:00
spl_soc64.c	mmc: Rename MMC_SUPPORT to MMC	2021-09-04 11:42:41 -04:00
system_manager_gen5.c
system_manager_soc64.c	arm: socfpga: Add handoff data support for Intel N5X device	2021-08-24 17:13:35 +08:00
timer.c
timer_s10.c
vab.c	global: Convert simple_strtoul() with hex to hextoul()	2021-08-02 13:32:14 -04:00
wrap_handoff_soc64.c	arm: socfpga: Add handoff data support for Intel N5X device	2021-08-24 17:13:35 +08:00
wrap_iocsr_config.c
wrap_pinmux_config.c
wrap_pll_config.c
wrap_pll_config_soc64.c	arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c	2021-04-08 17:29:12 +08:00
wrap_sdram_config.c