f02c1f695e
The code uses all in all three TMU registers, drop the massive register layout structures and just define the required timer registers and use them throughout the code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
54 lines
1.1 KiB
C
54 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2009
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* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* (C) Copyright 2007-2012
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* Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#if defined(CONFIG_CPU_SH3)
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#define TSTR 0x2
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#define TCNT0 0x8
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#define TCR0 0xc
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#endif /* CONFIG_CPU_SH3 */
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#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
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#define TSTR 0x4
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#define TCNT0 0xc
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#define TCR0 0x10
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#endif /* CONFIG_CPU_SH4 */
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#define TCR_TPSC 0x07
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#define TSTR_STR0 BIT(0)
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unsigned long get_tbclk(void)
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{
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#ifdef CONFIG_RCAR_GEN2
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return CONFIG_SYS_CLK_FREQ / 8;
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#else
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return CONFIG_SYS_CLK_FREQ / 4;
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#endif
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}
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unsigned long timer_read_counter(void)
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{
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return ~readl(TMU_BASE + TCNT0);
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}
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int timer_init(void)
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{
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writew(readw(TMU_BASE + TCR0) & ~TCR_TPSC, TMU_BASE + TCR0);
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writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR);
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writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR);
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return 0;
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}
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