dd6b68ed4f
In order to support IOMMUs in non-bypass mode we need device ops to map and unmap DMA memory. The map operation enters a mapping for a region specified by CPU address and size into the translation table of the IOMMU and returns a DMA address suitable for programming the device to do DMA. The unmap operation removes this mapping from the translation table of the IOMMU. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
73 lines
1.6 KiB
C
73 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
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*/
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#define LOG_CATEGORY UCLASS_IOMMU
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#include <common.h>
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#include <dm.h>
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#include <iommu.h>
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#include <phys2bus.h>
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#include <asm/io.h>
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#if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA))
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int dev_iommu_enable(struct udevice *dev)
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{
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struct ofnode_phandle_args args;
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struct udevice *dev_iommu;
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int i, count, ret = 0;
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count = dev_count_phandle_with_args(dev, "iommus",
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"#iommu-cells", 0);
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for (i = 0; i < count; i++) {
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ret = dev_read_phandle_with_args(dev, "iommus",
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"#iommu-cells", 0, i, &args);
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if (ret) {
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debug("%s: dev_read_phandle_with_args failed: %d\n",
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__func__, ret);
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return ret;
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}
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ret = uclass_get_device_by_ofnode(UCLASS_IOMMU, args.node,
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&dev_iommu);
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if (ret) {
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debug("%s: uclass_get_device_by_ofnode failed: %d\n",
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__func__, ret);
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return ret;
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}
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dev->iommu = dev_iommu;
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}
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return 0;
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}
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#endif
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dma_addr_t dev_iommu_dma_map(struct udevice *dev, void *addr, size_t size)
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{
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const struct iommu_ops *ops;
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if (dev->iommu) {
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ops = device_get_ops(dev->iommu);
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if (ops && ops->map)
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return ops->map(dev->iommu, addr, size);
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}
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return dev_phys_to_bus(dev, virt_to_phys(addr));
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}
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void dev_iommu_dma_unmap(struct udevice *dev, dma_addr_t addr, size_t size)
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{
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const struct iommu_ops *ops;
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if (dev->iommu) {
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ops = device_get_ops(dev->iommu);
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if (ops && ops->unmap)
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ops->unmap(dev->iommu, addr, size);
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}
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}
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UCLASS_DRIVER(iommu) = {
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.id = UCLASS_IOMMU,
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.name = "iommu",
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};
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