Flushing L3 cache in CCN-504 requries d-cache to be disabled. Using assembly function to guarantee stack is not used before flushing is completed. Timeout is needed for simualtor on which CCN-504 is not implemented. Return value can be checked for timeout situation. Change bootm.c to disable dcache instead of simply flushing, required by flushing L3. Signed-off-by: York Sun <yorksun@freescale.com> |
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arm720t | ||
arm920t | ||
arm926ejs | ||
arm946es | ||
arm1136 | ||
arm1176 | ||
armv7 | ||
armv8 | ||
pxa | ||
sa1100 | ||
Makefile | ||
u-boot-spl.lds | ||
u-boot.lds |