Simon Glass 7ea01d1808 x86: Add FDT SPI node for link ... Add a memory-mapped 8GB SPI chip. Signed-off-by: Simon Glass <sjg@chromium.org>		2013-03-19 08:45:37 -07:00
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coreboot	x86: Remove coreboot start16 code	2012-11-30 13:44:04 -08:00
dts	x86: Add FDT SPI node for link	2013-03-19 08:45:37 -07:00