This change allows to keep board description clean and minimalistic. This is especially helpful if one board may house different CPUs with different features. It is applicable to both FPGA-based boards or those that have CPUs mounted on interchnagable daughter-boards. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
4 lines
92 B
Text
4 lines
92 B
Text
CONFIG_ARC=y
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CONFIG_TARGET_ARCANGEL4=y
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CONFIG_SYS_CLK_FREQ=70000000
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CONFIG_CPU_BIG_ENDIAN=y
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