Rajesh Bhagat a1f95ff7d7 armv8: lsch3: Add serdes and DDR voltage setup ... Adds SERDES voltage and reset SERDES lanes API and makes enable/disable DDR controller support 0.9V API common. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>		2018-01-23 11:18:12 -08:00
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asm	armv8: lsch3: Add serdes and DDR voltage setup	2018-01-23 11:18:12 -08:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00