6c7a14084a
Added support for Total5100 and Total5200 (Rev.1 and Rev.2) MGT5100 and MPC5200 based Freescale platforms.
136 lines
3.1 KiB
C
136 lines
3.1 KiB
C
/*
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* (C) Copyright 2003-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2004
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* Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc5xxx.h>
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#include <pci.h>
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#include "sdram.h"
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#if CONFIG_TOTAL5200_REV==2
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#include "mt48lc32m16a2-75.h"
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#else
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#include "mt48lc16m16a2-75.h"
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#endif
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long int initdram (int board_type)
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{
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sdram_conf_t sdram_conf;
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sdram_conf.ddr = SDRAM_DDR;
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sdram_conf.mode = SDRAM_MODE;
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sdram_conf.emode = 0;
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sdram_conf.control = SDRAM_CONTROL;
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sdram_conf.config1 = SDRAM_CONFIG1;
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sdram_conf.config2 = SDRAM_CONFIG2;
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#if defined(CONFIG_MPC5200)
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sdram_conf.tapdelay = 0;
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#endif
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#if defined(CONFIG_MGT5100)
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sdram_conf.addrsel = SDRAM_ADDRSEL;
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#endif
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return mpc5xxx_sdram_init (&sdram_conf);
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}
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int checkboard (void)
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{
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#if defined(CONFIG_MPC5200)
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#if CONFIG_TOTAL5200_REV==2
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puts ("Board: Total5200 Rev.2 ");
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#else
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puts ("Board: Total5200 ");
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#endif
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#elif defined(CONFIG_MGT5100)
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puts ("Board: Total5100 ");
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#endif
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/*
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* Retrieve FPGA Revision.
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*/
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printf ("(FPGA %08X)\n", *(vu_long *) (CFG_FPGA_BASE + 0x400));
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/*
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* Take all peripherals in power-up mode.
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*/
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#if CONFIG_TOTAL5200_REV==2
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*(vu_char *) (CFG_CPLD_BASE + 0x46) = 0x70;
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#else
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*(vu_long *) (CFG_CPLD_BASE + 0x400) = 0x70;
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#endif
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return 0;
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}
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#if defined(CONFIG_MGT5100)
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int board_early_init_r(void)
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{
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/*
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* Now, when we are in RAM, enable CS0
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* because CS_BOOT cannot be written.
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*/
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*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
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*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
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return 0;
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}
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#endif
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#ifdef CONFIG_PCI
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static struct pci_controller hose;
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extern void pci_mpc5xxx_init(struct pci_controller *);
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void pci_init_board(void)
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{
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pci_mpc5xxx_init(&hose);
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}
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#endif
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#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
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/* IRDA_1 aka PSC6_3 (pin C13) */
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#define GPIO_IRDA_1 0x20000000UL
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void init_ide_reset (void)
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{
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debug ("init_ide_reset\n");
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/* Configure IRDA_1 (PSC6_3) as GPIO output for ATA reset */
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*(vu_long *) MPC5XXX_GPIO_ENABLE |= GPIO_IRDA_1;
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*(vu_long *) MPC5XXX_GPIO_DIR |= GPIO_IRDA_1;
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}
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void ide_set_reset (int idereset)
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{
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debug ("ide_reset(%d)\n", idereset);
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if (idereset) {
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*(vu_long *) MPC5XXX_GPIO_DATA_O &= ~GPIO_IRDA_1;
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} else {
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*(vu_long *) MPC5XXX_GPIO_DATA_O |= GPIO_IRDA_1;
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}
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}
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#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
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