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u-boot/arch/arm/cpu/armv7/omap5
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SRICHARAN R 6c70935d75 ARM: DRA: EMIF: Change DDR3 settings to use hw leveling 
Currently the DDR3 memory on DRA7 ES1.0 evm board is enabled using
software leveling. This was done since hardware leveling was not
working. Now that the right sequence to do hw leveling is identified,
use it. This is required for EMIF clockdomain to idle and come back
during lowpower usecases.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
2013-12-04 08:12:08 -05:00
..
abb.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
config.mk Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
emif.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
hw_data.c ARM: DRA: EMIF: Change DDR3 settings to use hw leveling 2013-12-04 08:12:08 -05:00
hwinit.c ARM: DRA: EMIF: Change DDR3 settings to use hw leveling 2013-12-04 08:12:08 -05:00
Makefile armv7: convert makefiles to Kbuild style 2013-10-31 12:53:39 -04:00
prcm-regs.c usb: dra7xx: Add support for dra7xx xhci USB host 2013-10-20 23:42:41 +02:00
sdram.c ARM: DRA: EMIF: Change DDR3 settings to use hw leveling 2013-12-04 08:12:08 -05:00