York Sun 51370d5618 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS ... These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage. Signed-off-by: York Sun <york.sun@nxp.com>		2017-01-04 19:40:52 -05:00
..
b4_pbi.cfg	board/b4860qds:Slow MDC clock to comply IEEE specs in PBI config	2014-04-22 17:58:47 -07:00
b4_rcw.cfg	powerpc/b4860/pbl: fix rcw cfg	2014-01-02 14:10:14 -08:00
b4860qds.c	powerpc: B4420: Remove macro CONFIG_PPC_B4420	2016-11-23 23:42:12 -08:00
b4860qds.h	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
b4860qds_crossbar_con.h	powerpc: B4420: Remove macro CONFIG_PPC_B4420	2016-11-23 23:42:12 -08:00
b4860qds_qixis.h	SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII mode	2013-10-16 16:13:11 -07:00
ddr.c	ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS	2017-01-04 19:40:52 -05:00
eth_b4860qds.c	powerpc: B4420: Remove macro CONFIG_PPC_B4420	2016-11-23 23:42:12 -08:00
Kconfig	powerpc: B4420QDS: Split from B4860QDS in Kconfig	2016-11-23 23:42:12 -08:00
law.c	powerpc/b4860: Enable law creation of MAPLE	2014-12-05 08:06:12 -08:00
MAINTAINERS	board/freescale: Update MAINTAINERS files	2016-08-02 09:47:34 -07:00
Makefile	powerpc: B4860QDS: Remove macro CONFIG_B4860QDS	2016-11-23 23:42:12 -08:00
pci.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
spl.c	powerpc/board: SPL: Enable malloc flag in global data.	2016-06-03 22:12:06 -07:00
tlb.c	board/b4qds:Add support of 2 stage NAND boot-loader	2014-04-22 17:58:51 -07:00