According to the Reference Manual the 'spdif0_clk_podf' field of register CCM_CDCDR corresponds to bits 22, 23 and 24, so fix the mask and offset definitions accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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cpu | ||
dts | ||
imx-common | ||
include/asm | ||
lib | ||
config.mk |