31431dd466
Based on discussion at https://lore.kernel.org/r/20200318125003.GA2727094@kroah.com we got recommendation to use explicit values for all enum values. The patch is following this recommendation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/daeb67ded45d8a8f6a96717d1fb9c84439dd2ae8.1612361627.git.michal.simek@xilinx.com
116 lines
3.1 KiB
C
116 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Xilinx Zynq MPSoC Firmware driver
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*
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* Copyright (C) 2018-2019 Xilinx, Inc.
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*/
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#ifndef _ZYNQMP_FIRMWARE_H_
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#define _ZYNQMP_FIRMWARE_H_
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enum pm_api_id {
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PM_GET_API_VERSION = 1,
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PM_SET_CONFIGURATION = 2,
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PM_GET_NODE_STATUS = 3,
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PM_GET_OPERATING_CHARACTERISTIC = 4,
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PM_REGISTER_NOTIFIER = 5,
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/* API for suspending */
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PM_REQUEST_SUSPEND = 6,
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PM_SELF_SUSPEND = 7,
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PM_FORCE_POWERDOWN = 8,
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PM_ABORT_SUSPEND = 9,
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PM_REQUEST_WAKEUP = 10,
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PM_SET_WAKEUP_SOURCE = 11,
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PM_SYSTEM_SHUTDOWN = 12,
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PM_REQUEST_NODE = 13,
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PM_RELEASE_NODE = 14,
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PM_SET_REQUIREMENT = 15,
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PM_SET_MAX_LATENCY = 16,
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/* Direct control API functions: */
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PM_RESET_ASSERT = 17,
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PM_RESET_GET_STATUS = 18,
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PM_MMIO_WRITE = 19,
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PM_MMIO_READ = 20,
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PM_PM_INIT_FINALIZE = 21,
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PM_FPGA_LOAD = 22,
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PM_FPGA_GET_STATUS = 23,
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PM_GET_CHIPID = 24,
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/* ID 25 is been used by U-boot to process secure boot images */
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/* Secure library generic API functions */
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PM_SECURE_SHA = 26,
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PM_SECURE_RSA = 27,
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PM_PINCTRL_REQUEST = 28,
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PM_PINCTRL_RELEASE = 29,
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PM_PINCTRL_GET_FUNCTION = 30,
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PM_PINCTRL_SET_FUNCTION = 31,
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PM_PINCTRL_CONFIG_PARAM_GET = 32,
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PM_PINCTRL_CONFIG_PARAM_SET = 33,
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PM_IOCTL = 34,
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PM_QUERY_DATA = 35,
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PM_CLOCK_ENABLE = 36,
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PM_CLOCK_DISABLE = 37,
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PM_CLOCK_GETSTATE = 38,
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PM_CLOCK_SETDIVIDER = 39,
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PM_CLOCK_GETDIVIDER = 40,
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PM_CLOCK_SETRATE = 41,
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PM_CLOCK_GETRATE = 42,
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PM_CLOCK_SETPARENT = 43,
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PM_CLOCK_GETPARENT = 44,
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PM_SECURE_IMAGE = 45,
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PM_FPGA_READ = 46,
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PM_SECURE_AES = 47,
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PM_CLOCK_PLL_GETPARAM = 49,
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/* PM_REGISTER_ACCESS API */
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PM_REGISTER_ACCESS = 52,
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PM_EFUSE_ACCESS = 53,
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PM_FEATURE_CHECK = 63,
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PM_API_MAX,
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};
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enum pm_query_id {
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PM_QID_INVALID = 0,
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PM_QID_CLOCK_GET_NAME = 1,
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PM_QID_CLOCK_GET_TOPOLOGY = 2,
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PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS = 3,
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PM_QID_CLOCK_GET_PARENTS = 4,
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PM_QID_CLOCK_GET_ATTRIBUTES = 5,
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PM_QID_PINCTRL_GET_NUM_PINS = 6,
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PM_QID_PINCTRL_GET_NUM_FUNCTIONS = 7,
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PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS = 8,
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PM_QID_PINCTRL_GET_FUNCTION_NAME = 9,
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PM_QID_PINCTRL_GET_FUNCTION_GROUPS = 10,
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PM_QID_PINCTRL_GET_PIN_GROUPS = 11,
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PM_QID_CLOCK_GET_NUM_CLOCKS = 12,
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PM_QID_CLOCK_GET_MAX_DIVISOR = 13,
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};
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#define PM_SIP_SVC 0xc2000000
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#define ZYNQMP_PM_VERSION_MAJOR 1
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#define ZYNQMP_PM_VERSION_MINOR 0
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#define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16
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#define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF
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#define ZYNQMP_PM_VERSION \
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((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \
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ZYNQMP_PM_VERSION_MINOR)
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#define ZYNQMP_PM_VERSION_INVALID ~0
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#define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
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/*
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* Return payload size
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* Not every firmware call expects the same amount of return bytes, however the
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* firmware driver always copies 5 bytes from RX buffer to the ret_payload
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* buffer. Therefore allocating with this defined value is recommended to avoid
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* overflows.
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*/
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#define PAYLOAD_ARG_CNT 5U
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unsigned int zynqmp_firmware_version(void);
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void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size);
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int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
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u32 arg3, u32 *ret_payload);
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#endif /* _ZYNQMP_FIRMWARE_H_ */
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