c5f177debc
K2G supports various sysclk frequencies which can be determined using sysboot pins. PLLs should be configured based on this sysclock frequency. Add PLL configurations for all supported sysclk frequencies. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
20 lines
365 B
C
20 lines
365 B
C
/*
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* K2G: Clock data
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*
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* (C) Copyright 2015
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_CLOCK_K2G_H
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#define __ASM_ARCH_CLOCK_K2G_H
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#define PLLSET_CMD_LIST "<pa|arm|ddr3>"
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#define DEV_SUPPORTED_SPEEDS 0xff
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#define ARM_SUPPORTED_SPEEDS 0x3ff
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#define KS2_CLK1_6 sys_clk0_6_clk
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#endif
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