aa6e94deab
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
81 lines
1.7 KiB
C
81 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* WORK Microwave work_92105 board support
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*
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* (C) Copyright 2014 DENX Software Engineering GmbH
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* Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/emc.h>
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#include <asm/arch/wdt.h>
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#include <asm/gpio.h>
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#include <spl.h>
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#include <linux/delay.h>
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#include "work_92105_display.h"
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DECLARE_GLOBAL_DATA_PTR;
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static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
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static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE;
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void reset_periph(void)
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{
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setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
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writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl);
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udelay(150);
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writel(0, &wdt->mctrl);
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clrbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
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}
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int board_early_init_f(void)
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{
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/* initialize serial port for console */
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lpc32xx_uart_init(CONFIG_CONS_INDEX);
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/* enable I2C, SSP, MAC, NAND */
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lpc32xx_i2c_init(1); /* only I2C1 has devices, I2C2 has none */
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lpc32xx_ssp_init();
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lpc32xx_mac_init();
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lpc32xx_mlc_nand_init();
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/* Display must wait until after relocation and devices init */
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return 0;
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}
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#define GPO_19 115
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int board_early_init_r(void)
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{
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/* Set NAND !WP to 1 through GPO_19 */
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gpio_request(GPO_19, "NAND_nWP");
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gpio_direction_output(GPO_19, 1);
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#ifdef CONFIG_DEPRECATED
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/* initialize display */
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work_92105_display_init();
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#endif
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return 0;
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}
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int board_init(void)
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{
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reset_periph();
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
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CFG_SYS_SDRAM_SIZE);
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return 0;
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}
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