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Author SHA1 Message Date
Marek Vasut
df78f016e8 ARM: socfpga: Make DRAM node available in SPL 
The SPL can also parse the DRAM configuration node to figure out the
memory layout, make sure it is available.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
 2018-07-12 09:22:13 +02:00
Marek Vasut
cc21ed62f9 ARM: socfpga: Synchronize Arria10 DTs 
Synchronize Altera Arria 10 DT sources with Linux 4.16.3 as of commit
ef8216d28a5920022cddcb694d2d75bd1f0035ca

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
 2018-05-18 10:30:46 +02:00