3 commits

Author	SHA1	Message	Date
Aneesh V	c2dd0d4554	armv7: integrate cache maintenance support ... - Enable I-cache on bootup - Enable MMU and D-cache immediately after relocation - Do necessary initialization before enabling d-cache and MMU - Changes to cleanup_before_linux() - Make changes according to the new framework Signed-off-by: Aneesh V <aneesh@ti.com>	2011-07-04 10:55:25 +02:00
Aneesh V	e47f2db537	armv7: rename cache related CONFIG flags ... Replace the cache related CONFIG flags with more meaningful names. Following are the changes: CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF Signed-off-by: Aneesh V <aneesh@ti.com> V2: * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE V4: * Changed all three flags to the final names suggested as above and accordingly changed the commit message	2011-07-04 10:55:25 +02:00
Steve Sakoman	f56348af5d	ARM: Rename arch/arm/cpu/arm_cortexa8 to armv7 ... The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9 Cortex A8 and A9 both belong to the armv7 architecture, hence the name change. The two architectures are similar enough that substantial code can be shared. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>	2010-07-05 19:59:55 -04:00

Renamed from arch/arm/cpu/arm_cortexa8/cpu.c (Browse further)