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board: sama5d3xek: Convert to CONFIG_DM_VIDEO

Browse source 
Convert the board to support the video driver model, add the device
tree node, and remove the unnecessary code.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Wenyou Yang 2017-09-18 15:25:58 +08:00 committed by Anatolij Gustschin
parent d2cd09bb44
commit fe32c6d159
11 changed files with 43 additions and 115 deletions
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1
arch/arm/dts/sama5d36ek_cmp.dts
View file

@ -8,6 +8,7 @@
/dts-v1/;
#include "sama5d36.dtsi"
#include "sama5d3xmb_cmp.dtsi"
#include "sama5d3xdm.dtsi"
/ {
model = "Atmel SAMA5D36-EK";

21
arch/arm/dts/sama5d3_lcd.dtsi
View file

@ -14,31 +14,12 @@
ahb {
apb {
hlcdc: hlcdc@f0030000 {
compatible = "atmel,sama5d3-hlcdc";
compatible = "atmel,at91sam9x5-hlcdc";
reg = <0xf0030000 0x2000>;
interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
clock-names = "periph_clk","sys_clk", "slow_clk";
status = "disabled";
hlcdc-display-controller {
compatible = "atmel,hlcdc-display-controller";
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
};
hlcdc_pwm: hlcdc-pwm {
compatible = "atmel,hlcdc-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_pwm>;
#pwm-cells = <3>;
};
};
pinctrl@fffff200 {

26
arch/arm/dts/sama5d3xdm.dtsi
View file

@ -10,6 +10,32 @@
/ {
ahb {
apb {
hlcdc: hlcdc@f0030000 {
atmel,vl-bpix = <4>;
atmel,output-mode = <24>;
atmel,guard-time = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888_alt>;
status = "okay";
u-boot,dm-pre-reloc;
display-timings {
u-boot,dm-pre-reloc;
800x480 {
clock-frequency = <24000000>;
hactive = <800>;
vactive = <480>;
hsync-len = <5>;
hfront-porch = <64>;
hback-porch = <64>;
vfront-porch = <22>;
vback-porch = <21>;
vsync-len = <5>;
u-boot,dm-pre-reloc;
};
};
};
i2c1: i2c@f0018000 {
qt1070: keyboard@1b {
compatible = "qt1070";

83
board/atmel/sama5d3xek/sama5d3xek.c
View file

@ -13,9 +13,7 @@
#include <asm/arch/gpio.h>
#include <asm/arch/clk.h>
#include <debug_uart.h>
#include <lcd.h>
#include <linux/ctype.h>
#include <atmel_hlcdc.h>
#include <phy.h>
#include <micrel.h>
#include <spl.h>
@ -132,80 +130,6 @@ static void sama5d3xek_mci_hw_init(void)
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
.vl_col = 800,
.vl_row = 480,
.vl_clk = 24000000,
.vl_bpix = LCD_BPP,
.vl_tft = 1,
.vl_hsync_len = 128,
.vl_left_margin = 64,
.vl_right_margin = 64,
.vl_vsync_len = 2,
.vl_upper_margin = 22,
.vl_lower_margin = 21,
.mmio = ATMEL_BASE_LCDC,
};
void lcd_enable(void)
{
}
void lcd_disable(void)
{
}
static void sama5d3xek_lcd_hw_init(void)
{
gd->fb_base = CONFIG_SAMA5D3_LCD_BASE;
/* The higher 8 bit of LCD is board related */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 14, 0); /* LCDD16 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 13, 0); /* LCDD17 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 12, 0); /* LCDD18 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 11, 0); /* LCDD19 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 10, 0); /* LCDD20 */
at91_pio3_set_c_periph(AT91_PIO_PORTC, 15, 0); /* LCDD21 */
at91_pio3_set_c_periph(AT91_PIO_PORTE, 27, 0); /* LCDD22 */
at91_pio3_set_c_periph(AT91_PIO_PORTE, 28, 0); /* LCDD23 */
/* Configure lower 16 bit of LCD and enable clock */
at91_lcd_hw_init();
}
#ifdef CONFIG_LCD_INFO
#include <nand.h>
#include <version.h>
void lcd_show_board_info(void)
{
ulong dram_size;
uint64_t nand_size;
int i;
char temp[32];
lcd_printf("%s\n", U_BOOT_VERSION);
lcd_printf("(C) 2013 ATMEL Corp\n");
lcd_printf("at91@atmel.com\n");
lcd_printf("%s CPU at %s MHz\n", get_cpu_name(),
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += get_nand_dev_by_index(i)->size;
#endif
lcd_printf("%ld MB SDRAM, %lld MB NAND\n",
dram_size >> 20, nand_size >> 20);
}
#endif /* CONFIG_LCD_INFO */
#endif /* CONFIG_LCD */
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
@ -239,10 +163,6 @@ int board_init(void)
#endif
#ifdef CONFIG_GENERIC_ATMEL_MCI
sama5d3xek_mci_hw_init();
#endif
#ifdef CONFIG_LCD
if (has_lcdc())
sama5d3xek_lcd_hw_init();
#endif
return 0;
}
@ -268,6 +188,9 @@ int board_late_init(void)
strcat(name, "ek.dtb");
env_set("dtb_name", name);
#endif
#ifdef CONFIG_DM_VIDEO
at91_video_show_board_info();
#endif
return 0;
}

3
configs/sama5d36ek_cmp_mmc_defconfig
View file

@ -55,4 +55,5 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d36ek_cmp_nandflash_defconfig
View file

@ -55,5 +55,6 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_LCD=y
CONFIG_FAT_WRITE=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d36ek_cmp_spiflash_defconfig
View file

@ -55,5 +55,6 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_SPI=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y
CONFIG_FAT_WRITE=y

3
configs/sama5d3xek_mmc_defconfig
View file

@ -81,4 +81,5 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y

3
configs/sama5d3xek_nandflash_defconfig
View file

@ -76,5 +76,6 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y
CONFIG_FAT_WRITE=y

3
configs/sama5d3xek_spiflash_defconfig
View file

@ -77,5 +77,6 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_ATMEL_USBA=y
CONFIG_LCD=y
CONFIG_DM_VIDEO=y
CONFIG_ATMEL_HLCD=y
CONFIG_FAT_WRITE=y

9
include/configs/sama5d3xek.h
View file

@ -28,15 +28,6 @@
*/
#define ATMEL_PMC_UHP (1 << 6)
/* LCD */
#define LCD_BPP LCD_COLOR16
#define LCD_OUTPUT_BPP 24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565
/* board specific (not enough SRAM) */
#define CONFIG_SAMA5D3_LCD_BASE 0x23E00000