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powerpc: dts: p2020: Define L2 cache node

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Copy definition of L2 cache node from upstream Linux kernel P2020 dts files.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Pali Rohár 2022-04-08 14:39:57 +02:00 committed by Priyanka Jain
parent 787d2c024b
commit fd3dc72945
2 changed files with 10 additions and 0 deletions
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8
arch/powerpc/dts/p2020-post.dtsi
View file

@ -56,6 +56,14 @@
/include/ "pq3-duart-0.dtsi"
/include/ "pq3-gpio-0.dtsi"
L2: l2-cache-controller@20000 {
compatible = "fsl,p2020-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; /* 32 bytes */
cache-size = <0x80000>; /* L2,512K */
interrupts = <16 2 0 0>;
};
/include/ "pq3-etsec1-0.dtsi"
/include/ "pq3-etsec1-timer-0.dtsi"

2
arch/powerpc/dts/p2020.dtsi
View file

@ -22,10 +22,12 @@
cpu0: PowerPC,P2020@0 {
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
};
cpu1: PowerPC,P2020@1 {
device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};
};
};