Difuse/u-boot
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

sf: Use BIT macro

Browse source 
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
This commit is contained in:
Jagan Teki 2015-12-14 18:12:04 +05:30
parent 7bc679fb14
commit eb020f69e0
1 changed files with 21 additions and 21 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

42
drivers/mtd/spi/sf_internal.h
View file

@ -16,18 +16,18 @@
/* Dual SPI flash memories - see SPI_COMM_DUAL_... */
enum spi_dual_flash {
SF_SINGLE_FLASH = 0,
SF_DUAL_STACKED_FLASH = 1 << 0,
SF_DUAL_PARALLEL_FLASH = 1 << 1,
SF_DUAL_STACKED_FLASH = BIT(0),
SF_DUAL_PARALLEL_FLASH = BIT(1),
};
/* Enum list - Full read commands */
enum spi_read_cmds {
ARRAY_SLOW = 1 << 0,
ARRAY_FAST = 1 << 1,
DUAL_OUTPUT_FAST = 1 << 2,
DUAL_IO_FAST = 1 << 3,
QUAD_OUTPUT_FAST = 1 << 4,
QUAD_IO_FAST = 1 << 5,
ARRAY_SLOW = BIT(0),
ARRAY_FAST = BIT(1),
DUAL_OUTPUT_FAST = BIT(2),
DUAL_IO_FAST = BIT(3),
QUAD_OUTPUT_FAST = BIT(4),
QUAD_IO_FAST = BIT(5),
};
/* Normal - Extended - Full command set */
@ -37,20 +37,20 @@ enum spi_read_cmds {
/* sf param flags */
enum {
#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
SECT_4K = 1 << 0,
#ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS
SECT_4K = 0,
#else
SECT_4K = 0 << 0,
SECT_4K = BIT(0),
#endif
SECT_32K = 1 << 1,
E_FSR = 1 << 2,
SST_WR = 1 << 3,
WR_QPP = 1 << 4,
SECT_32K = BIT(1),
E_FSR = BIT(2),
SST_WR = BIT(3),
WR_QPP = BIT(4),
};
enum spi_nor_option_flags {
SNOR_F_SST_WR = (1 << 0),
SNOR_F_USE_FSR = (1 << 1),
SNOR_F_SST_WR = BIT(0),
SNOR_F_USE_FSR = BIT(1),
};
#define SPI_FLASH_3B_ADDR_LEN 3
@ -100,10 +100,10 @@ enum spi_nor_option_flags {
#endif
/* Common status */
#define STATUS_WIP (1 << 0)
#define STATUS_QEB_WINSPAN (1 << 1)
#define STATUS_QEB_MXIC (1 << 6)
#define STATUS_PEC (1 << 7)
#define STATUS_WIP BIT(0)
#define STATUS_QEB_WINSPAN BIT(1)
#define STATUS_QEB_MXIC BIT(6)
#define STATUS_PEC BIT(7)
#define SR_BP0 BIT(2) /* Block protect 0 */
#define SR_BP1 BIT(3) /* Block protect 1 */
#define SR_BP2 BIT(4) /* Block protect 2 */