x86: Set the DRAM banks to reflect real location
At present with fsp a single DRAM bank is added which extends to the whole size of memory. However there is typically only 2GB of memory available below the 4GB boundary, and this is what is used by U-Boot while running in 32-bit mode. Scan the tables to set the banks correct. The first bank is set to memory below 4GB, and the rest of memory is put into subsequent banks. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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1 changed files with 29 additions and 1 deletions
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@ -38,8 +38,36 @@ int fsp_scan_for_ram_size(void)
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int dram_init_banksize(void)
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{
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const struct hob_header *hdr;
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struct hob_res_desc *res_desc;
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phys_addr_t low_end;
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uint bank;
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low_end = 0;
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for (bank = 1, hdr = gd->arch.hob_list;
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bank < CONFIG_NR_DRAM_BANKS && !end_of_hob(hdr);
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hdr = get_next_hob(hdr)) {
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if (hdr->type != HOB_TYPE_RES_DESC)
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continue;
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res_desc = (struct hob_res_desc *)hdr;
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if (res_desc->type != RES_SYS_MEM &&
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res_desc->type != RES_MEM_RESERVED)
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continue;
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if (res_desc->phys_start < (1ULL << 32)) {
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low_end = max(low_end,
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res_desc->phys_start + res_desc->len);
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continue;
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}
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gd->bd->bi_dram[bank].start = res_desc->phys_start;
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gd->bd->bi_dram[bank].size = res_desc->len;
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log_debug("ram %llx %llx\n", gd->bd->bi_dram[bank].start,
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gd->bd->bi_dram[bank].size);
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}
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/* Add the memory below 4GB */
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gd->bd->bi_dram[0].start = 0;
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gd->bd->bi_dram[0].size = gd->ram_size;
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gd->bd->bi_dram[0].size = low_end;
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return 0;
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}
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