Difuse/u-boot
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi

Browse source 
- add new series Micron SPI NAND devices (Shivamurthy)
This commit is contained in:
Tom Rini 2020-07-21 16:13:43 -04:00
commit e9f1f5f486
2 changed files with 137 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

150
drivers/mtd/nand/spi/micron.c
View file

@ -22,6 +22,16 @@
#define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
#define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4)
#define MICRON_CFG_CR BIT(0)
/*
* As per datasheet, die selection is done by the 6th bit of Die
* Select Register (Address 0xD0).
*/
#define MICRON_DIE_SELECT_REG 0xD0
#define MICRON_SELECT_DIE(x) ((x) << 6)
static SPINAND_OP_VARIANTS(read_cache_variants,
SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
@ -38,38 +48,52 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
SPINAND_PROG_LOAD(false, 0, NULL, 0));
static int mt29f2g01abagd_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *region)
static int micron_8_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *region)
{
if (section)
return -ERANGE;
region->offset = 64;
region->length = 64;
region->offset = mtd->oobsize / 2;
region->length = mtd->oobsize / 2;
return 0;
}
static int mt29f2g01abagd_ooblayout_free(struct mtd_info *mtd, int section,
struct mtd_oob_region *region)
static int micron_8_ooblayout_free(struct mtd_info *mtd, int section,
struct mtd_oob_region *region)
{
if (section)
return -ERANGE;
/* Reserve 2 bytes for the BBM. */
region->offset = 2;
region->length = 62;
region->length = (mtd->oobsize / 2) - 2;
return 0;
}
static const struct mtd_ooblayout_ops mt29f2g01abagd_ooblayout = {
.ecc = mt29f2g01abagd_ooblayout_ecc,
.rfree = mt29f2g01abagd_ooblayout_free,
static const struct mtd_ooblayout_ops micron_8_ooblayout = {
.ecc = micron_8_ooblayout_ecc,
.rfree = micron_8_ooblayout_free,
};
static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
u8 status)
static int micron_select_target(struct spinand_device *spinand,
unsigned int target)
{
struct spi_mem_op op = SPINAND_SET_FEATURE_OP(MICRON_DIE_SELECT_REG,
spinand->scratchbuf);
if (target > 1)
return -EINVAL;
*spinand->scratchbuf = MICRON_SELECT_DIE(target);
return spi_mem_exec_op(spinand->slave, &op);
}
static int micron_8_ecc_get_status(struct spinand_device *spinand,
u8 status)
{
switch (status & MICRON_STATUS_ECC_MASK) {
case STATUS_ECC_NO_BITFLIPS:
@ -95,6 +119,7 @@ static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
}
static const struct spinand_info micron_spinand_table[] = {
/* M79A 2Gb 3.3V */
SPINAND_INFO("MT29F2G01ABAGD", 0x24,
NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
NAND_ECCREQ(8, 512),
@ -102,8 +127,91 @@ static const struct spinand_info micron_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
0,
SPINAND_ECCINFO(&mt29f2g01abagd_ooblayout,
mt29f2g01abagd_ecc_get_status)),
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
/* M79A 2Gb 1.8V */
SPINAND_INFO("MT29F2G01ABBGD", 0x25,
NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
0,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
/* M78A 1Gb 3.3V */
SPINAND_INFO("MT29F1G01ABAFD", 0x14,
NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
0,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
/* M78A 1Gb 1.8V */
SPINAND_INFO("MT29F1G01ABAFD", 0x15,
NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
0,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
/* M79A 4Gb 3.3V */
SPINAND_INFO("MT29F4G01ADAGD", 0x36,
NAND_MEMORG(1, 2048, 128, 64, 2048, 2, 1, 2),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
0,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status),
SPINAND_SELECT_TARGET(micron_select_target)),
/* M70A 4Gb 3.3V */
SPINAND_INFO("MT29F4G01ABAFD", 0x34,
NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
SPINAND_HAS_CR_FEAT_BIT,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
/* M70A 4Gb 1.8V */
SPINAND_INFO("MT29F4G01ABBFD", 0x35,
NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
SPINAND_HAS_CR_FEAT_BIT,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status)),
/* M70A 8Gb 3.3V */
SPINAND_INFO("MT29F8G01ADAFD", 0x46,
NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 2),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
SPINAND_HAS_CR_FEAT_BIT,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status),
SPINAND_SELECT_TARGET(micron_select_target)),
/* M70A 8Gb 1.8V */
SPINAND_INFO("MT29F8G01ADBFD", 0x47,
NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 2),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
SPINAND_HAS_CR_FEAT_BIT,
SPINAND_ECCINFO(&micron_8_ooblayout,
micron_8_ecc_get_status),
SPINAND_SELECT_TARGET(micron_select_target)),
};
static int micron_spinand_detect(struct spinand_device *spinand)
@ -126,8 +234,22 @@ static int micron_spinand_detect(struct spinand_device *spinand)
return 1;
}
static int micron_spinand_init(struct spinand_device *spinand)
{
/*
* M70A device series enable Continuous Read feature at Power-up,
* which is not supported. Disable this bit to avoid any possible
* failure.
*/
if (spinand->flags & SPINAND_HAS_CR_FEAT_BIT)
return spinand_upd_cfg(spinand, MICRON_CFG_CR, 0);
return 0;
}
static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
.detect = micron_spinand_detect,
.init = micron_spinand_init,
};
const struct spinand_manufacturer micron_spinand_manufacturer = {

1
include/linux/mtd/spinand.h
View file

@ -246,6 +246,7 @@ struct spinand_ecc_info {
};
#define SPINAND_HAS_QE_BIT BIT(0)
#define SPINAND_HAS_CR_FEAT_BIT BIT(1)
/**
* struct spinand_info - Structure used to describe SPI NAND chips