x86: braswell: Add microcode for B0/C0/D0 stepping SoC
This adds microcode device tree fragment for Braswell B0 (406C2), C0 (406C3) and D0 (406C4) stepping SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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arch/x86/dts/microcode/m01406c2220.dtsi
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arch/x86/dts/microcode/m01406c2220.dtsi
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arch/x86/dts/microcode/m01406c3363.dtsi
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arch/x86/dts/microcode/m01406c3363.dtsi
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arch/x86/dts/microcode/m01406c440a.dtsi
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arch/x86/dts/microcode/m01406c440a.dtsi
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