Pull request for efi-2022-01-rc4-3

Documentation:
 
 * add Calxeda Highbank/Midway board documentation
 
 Bug fixes:
 
 * call part_init() in blk_get_device_by_str() only for MMC
 * fix an 'undefined' error in some driver model macros
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Merge tag 'efi-2022-01-rc4-3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-01-rc4-3

Documentation:

* add Calxeda Highbank/Midway board documentation

Bug fixes:

* call part_init() in blk_get_device_by_str() only for MMC
* fix an 'undefined' error in some driver model macros

disk/part.c

@@ -430,7 +430,8 @@ int blk_get_device_by_str(const char *ifname, const char *dev_hwpart_str,
 	 * Always should be done, otherwise hw partition 0 will return stale
 	 * data after displaying a non-zero hw partition.
 	 */
-	part_init(*dev_desc);
+	if ((*dev_desc)->if_type == IF_TYPE_MMC)
+		part_init(*dev_desc);
 #endif
 
 cleanup:

doc/board/highbank/highbank.rst

@@ -0,0 +1,78 @@
+Calxeda Highbank/Midway board support
+=====================================
+
+The Calxeda ECX-1000 ("Highbank") and ECX-2000 ("Midway") were ARM based
+servers, providing high-density cluster systems. A single motherboard could
+host between 12 and 48 nodes, each with their own quad-core ARMv7
+processor, private DRAM and peripherals, connected through a high-bandwith
+and low-latency "fabric" network. Multiple motherboards could be connected
+together, to extend this fabric.
+
+For the purpose of U-Boot we just care about a single node, this can be
+used as a single system, just using the fabric to connect to some Ethernet
+network. Each node boots on its own, either from a local hard disk, or
+via the network.
+
+The earlier ECX-1000 nodes ("Highbank") contain four ARM Cortex-A9 cores,
+a Cortex-M3 system controller, three 10GBit/s MACs and five SATA
+controllers. The DRAM is limited to 4GB.
+
+The later ECX-2000 nodes ("Midway") use four Cortex-A15 cores, alongside
+two Cortex-A7 management cores, and support up to 32GB of DRAM, while
+keeping the other peripherals.
+
+For the purpose of U-Boot those two SoCs are very similar, so we offer
+one build target. The subtle differences are handled at runtime.
+Calxeda as a company is long defunct, and the remaining systems are
+considered legacy at this point.
+
+Bgilding U-Boot
+---------------
+There is only one defconfig to cover both systems::
+
+    $ make highbank_defconfig
+    $ make
+
+This will create ``u-boot.bin``, which could become part of the firmware update
+package, or could be chainloaded by the existing U-Boot, see below for more
+details.
+
+Boot process
+------------
+Upon powering up a node (which would be controlled by some BMC style
+management controller on the motherboard), the system controller ("ECME")
+would start and do some system initialisation (fabric registration,
+DRAM init, clock setup). It would load the device tree binary, some secure
+monitor code (``a9boot``/``a15boot``) and a U-Boot binary from SPI flash
+into DRAM, then power up the actual application cores (ARM Cortex-A9/A15).
+They would start executing ``a9boot``/``a15boot``, registering the PSCI SMC
+handlers, then dropping into U-Boot, but in non-secure state (HYP mode on
+the A15s).
+
+U-Boot would act as a mere loader, trying to find some ``boot.scr`` file on
+the local hard disks, or reverting to PXE boot.
+
+Updating U-Boot
+---------------
+The U-Boot binary is loaded from SPI flash, which is controlled exclusively
+by the ECME. This can be reached via IPMI using the LANplus transport protocol.
+Updating the SPI flash content requires vendor specific additions to the
+IPMI protocol, support for which was never upstreamed to ipmitool or
+FreeIPMI. Some older repositories for `ipmitool`_, the `pyipmi`_ library and
+a Python `management script`_ to update the SPI flash can be found on Github.
+
+A simpler and safer way to get an up-to-date U-Boot running, is chainloading
+it via the legacy U-Boot::
+
+    $ mkimage -A arm -O u-boot -T standalone -C none -a 0x8000 -e 0x8000 \
+      -n U-Boot -d u-boot.bin u-boot-highbank.img
+
+Then load this image file, either from hard disk, or via TFTP, from the
+existing U-Boot, and execute it with bootm::
+
+    => tftpboot 0x8000 u-boot-highbank.img
+    => bootm
+
+.. _`ipmitool`: https://github.com/Cynerva/ipmitool
+.. _`pyipmi`: https://pypi.org/project/pyipmi/
+.. _`management script`: https://github.com/Cynerva/cxmanage

doc/board/highbank/index.rst

@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Highbank
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   highbank

doc/board/index.rst

@@ -16,6 +16,7 @@ Board-specific doc
    coreboot/index
    emulation/index
    google/index
+   highbank/index
    intel/index
    kontron/index
    microchip/index

drivers/block/blk-uclass.c

@@ -672,6 +672,19 @@ int blk_create_devicef(struct udevice *parent, const char *drv_name,
 	return 0;
 }
 
+int blk_probe_or_unbind(struct udevice *dev)
+{
+	int ret;
+
+	ret = device_probe(dev);
+	if (ret) {
+		log_debug("probing %s failed\n", dev->name);
+		device_unbind(dev);
+	}
+
+	return ret;
+}
+
 int blk_unbind_all(int if_type)
 {
 	struct uclass *uc;

include/blk.h

@@ -370,6 +370,18 @@ int blk_create_devicef(struct udevice *parent, const char *drv_name,
 		       const char *name, int if_type, int devnum, int blksz,
 		       lbaint_t lba, struct udevice **devp);
 
+/**
+ * blk_probe_or_unbind() - Try to probe
+ *
+ * Try to probe the device, primarily for enumerating partitions.
+ * If it fails, the device itself is unbound since it means that it won't
+ * work any more.
+ *
+ * @dev:	The device to probe
+ * Return:	0 if OK, -ve on error
+ */
+int blk_probe_or_unbind(struct udevice *dev);
+
 /**
  * blk_unbind_all() - Unbind all device of the given interface type
  *

include/dm/device.h

@@ -959,8 +959,8 @@ static inline bool device_is_on_pci_bus(const struct udevice *dev)
  * @parent: parent device to scan
  */
 #define device_foreach_child_of_to_plat(pos, parent)	\
-	for (int _ret = device_first_child_ofdata_err(parent, &dev); !_ret; \
-	     _ret = device_next_child_ofdata_err(&dev))
+	for (int _ret = device_first_child_ofdata_err(parent, &pos); !_ret; \
+	     _ret = device_next_child_ofdata_err(&pos))
 
 /**
  * device_foreach_child_probe() - iterate through children, probing them
@@ -976,8 +976,8 @@ static inline bool device_is_on_pci_bus(const struct udevice *dev)
  * @parent: parent device to scan
  */
 #define device_foreach_child_probe(pos, parent)	\
-	for (int _ret = device_first_child_err(parent, &dev); !_ret; \
-	     _ret = device_next_child_err(&dev))
+	for (int _ret = device_first_child_err(parent, &pos); !_ret; \
+	     _ret = device_next_child_err(&pos))
 
 /**
  * dm_scan_fdt_dev() - Bind child device in the device tree