imx6: aristainetos: convert CONFIG_DM_SPI
enable CONFIG_DM_SPI and CONFIG_DM_SPI_FLASH and get rid of build removal warnings. define CONFIG_GPIO_ENABLE_SPI_FLASH is not longer needed, so remove it from config_whitelist.txt Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
parent
64679e2c80
commit
cf8cbb0709
4 changed files with 2 additions and 100 deletions
|
@ -32,7 +32,6 @@
|
|||
#include <dm/root.h>
|
||||
#include <env.h>
|
||||
#include <micrel.h>
|
||||
#include <spi.h>
|
||||
#include <video.h>
|
||||
#include <../drivers/video/imx/ipu.h>
|
||||
#if defined(CONFIG_VIDEO_BMP_LOGO)
|
||||
|
@ -45,9 +44,6 @@ DECLARE_GLOBAL_DATA_PTR;
|
|||
#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
|
||||
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
|
||||
|
||||
#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
|
||||
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
|
||||
|
||||
#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
|
||||
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
|
||||
PAD_CTL_ODE | PAD_CTL_SRE_FAST)
|
||||
|
@ -56,18 +52,6 @@ DECLARE_GLOBAL_DATA_PTR;
|
|||
|
||||
#define DISP_PAD_CTRL (0x10)
|
||||
|
||||
#define ECSPI4_CS1 IMX_GPIO_NR(5, 2)
|
||||
|
||||
#if (CONFIG_SYS_BOARD_VERSION == 2)
|
||||
/* 4.3 display controller */
|
||||
#define ECSPI1_CS0 IMX_GPIO_NR(4, 9)
|
||||
#define ECSPI4_CS0 IMX_GPIO_NR(3, 29)
|
||||
#elif (CONFIG_SYS_BOARD_VERSION == 3)
|
||||
#define ECSPI1_CS0 IMX_GPIO_NR(2, 30) /* NOR flash */
|
||||
/* 4.3 display controller */
|
||||
#define ECSPI1_CS1 IMX_GPIO_NR(4, 10)
|
||||
#endif
|
||||
|
||||
enum {
|
||||
BOARD_TYPE_4 = 4,
|
||||
BOARD_TYPE_7 = 7,
|
||||
|
@ -129,33 +113,11 @@ static iomux_v3_cfg_t const backlight_pads[] = {
|
|||
MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
};
|
||||
|
||||
static iomux_v3_cfg_t const ecspi1_pads[] = {
|
||||
MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
|
||||
MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
|
||||
MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
|
||||
#if (CONFIG_SYS_BOARD_VERSION == 2)
|
||||
MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(SPI_PAD_CTRL),
|
||||
#elif (CONFIG_SYS_BOARD_VERSION == 3)
|
||||
MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(SPI_PAD_CTRL),
|
||||
MX6_PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
#endif
|
||||
};
|
||||
|
||||
static void setup_iomux_enet(void)
|
||||
{
|
||||
imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
|
||||
}
|
||||
|
||||
#if (CONFIG_SYS_BOARD_VERSION == 2)
|
||||
iomux_v3_cfg_t const ecspi4_pads[] = {
|
||||
MX6_PAD_EIM_D21__ECSPI4_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
MX6_PAD_EIM_D22__ECSPI4_MISO | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
MX6_PAD_EIM_D28__ECSPI4_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
|
||||
};
|
||||
#endif
|
||||
|
||||
static iomux_v3_cfg_t const display_pads[] = {
|
||||
MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(DISP_PAD_CTRL),
|
||||
MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15,
|
||||
|
@ -187,50 +149,6 @@ static iomux_v3_cfg_t const display_pads[] = {
|
|||
MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23,
|
||||
};
|
||||
|
||||
int board_spi_cs_gpio(unsigned int bus, unsigned int cs)
|
||||
{
|
||||
if (bus == CONFIG_SF_DEFAULT_BUS && cs == CONFIG_SF_DEFAULT_CS)
|
||||
#if (CONFIG_SYS_BOARD_VERSION == 2)
|
||||
return IMX_GPIO_NR(5, 2);
|
||||
|
||||
if (bus == 0 && cs == 0)
|
||||
return IMX_GPIO_NR(4, 9);
|
||||
#elif (CONFIG_SYS_BOARD_VERSION == 3)
|
||||
return ECSPI1_CS0;
|
||||
|
||||
if (bus == 0 && cs == 1)
|
||||
return ECSPI1_CS1;
|
||||
#endif
|
||||
return -1;
|
||||
}
|
||||
|
||||
static void setup_spi(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
|
||||
|
||||
#if (CONFIG_SYS_BOARD_VERSION == 2)
|
||||
imx_iomux_v3_setup_multiple_pads(ecspi4_pads, ARRAY_SIZE(ecspi4_pads));
|
||||
#endif
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
enable_spi_clk(true, i);
|
||||
|
||||
gpio_request(ECSPI1_CS0, "spi1_cs0");
|
||||
gpio_direction_output(ECSPI1_CS0, 1);
|
||||
#if (CONFIG_SYS_BOARD_VERSION == 2)
|
||||
gpio_request(ECSPI4_CS1, "spi4_cs1");
|
||||
gpio_direction_output(ECSPI4_CS1, 0);
|
||||
/* set cs0 to high (second device on spi bus #4) */
|
||||
gpio_request(ECSPI4_CS0, "spi4_cs0");
|
||||
gpio_direction_output(ECSPI4_CS0, 1);
|
||||
#elif (CONFIG_SYS_BOARD_VERSION == 3)
|
||||
gpio_request(ECSPI1_CS1, "spi1_cs1");
|
||||
gpio_direction_output(ECSPI1_CS1, 1);
|
||||
#endif
|
||||
}
|
||||
|
||||
int board_phy_config(struct phy_device *phydev)
|
||||
{
|
||||
/* control data pad skew - devaddr = 0x02, register = 0x04 */
|
||||
|
@ -564,13 +482,6 @@ static void setup_board_gpio(void)
|
|||
setup_one_led("led_blue", LEDST_OFF);
|
||||
}
|
||||
|
||||
static void setup_board_spi(void)
|
||||
{
|
||||
/* enable spi bus #2 SS drivers (and spi bus #4 SS1 for rev2b) */
|
||||
gpio_request(IMX_GPIO_NR(6, 6), "spi_ena");
|
||||
gpio_direction_output(IMX_GPIO_NR(6, 6), 1);
|
||||
}
|
||||
|
||||
int board_late_init(void)
|
||||
{
|
||||
char *my_bootdelay;
|
||||
|
@ -785,8 +696,6 @@ int board_init(void)
|
|||
/* address of boot parameters */
|
||||
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
|
||||
|
||||
setup_spi();
|
||||
|
||||
setup_i2c(0, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
|
||||
&i2c_pad_info1);
|
||||
setup_i2c(1, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
|
||||
|
@ -795,14 +704,8 @@ int board_init(void)
|
|||
&i2c_pad_info3);
|
||||
setup_i2c4();
|
||||
|
||||
/* SPI NOR Flash read only */
|
||||
gpio_request(CONFIG_GPIO_ENABLE_SPI_FLASH, "ena_spi_nor");
|
||||
gpio_direction_output(CONFIG_GPIO_ENABLE_SPI_FLASH, 0);
|
||||
gpio_free(CONFIG_GPIO_ENABLE_SPI_FLASH);
|
||||
|
||||
setup_board_gpio();
|
||||
setup_gpmi_nand();
|
||||
setup_board_spi();
|
||||
|
||||
/* GPIO_1 for USB_OTG_ID */
|
||||
clrsetbits_le32(&iomux->gpr[1], IOMUXC_GPR1_USB_OTG_ID_SEL_MASK, 0);
|
||||
|
|
|
@ -64,6 +64,7 @@ CONFIG_FSL_USDHC=y
|
|||
CONFIG_MTD=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_NAND_MXS=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_BUS=3
|
||||
CONFIG_SF_DEFAULT_CS=1
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
|
@ -84,6 +85,7 @@ CONFIG_DM_REGULATOR_FIXED=y
|
|||
CONFIG_PWM_IMX=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_MXC_SPI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
|
|
|
@ -31,8 +31,6 @@
|
|||
"ubifsload ${fit_addr_r} /boot/system.itb; " \
|
||||
"imi ${fit_addr_r}\0 "
|
||||
|
||||
#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15)
|
||||
|
||||
/* Framebuffer */
|
||||
#define CONFIG_SYS_LDB_CLOCK 33246000
|
||||
#define CONFIG_LG4573
|
||||
|
|
|
@ -649,7 +649,6 @@ CONFIG_GLOBAL_DATA_NOT_REG10
|
|||
CONFIG_GLOBAL_TIMER
|
||||
CONFIG_GMII
|
||||
CONFIG_GPCNTRL
|
||||
CONFIG_GPIO_ENABLE_SPI_FLASH
|
||||
CONFIG_GPIO_LED_INVERTED_TABLE
|
||||
CONFIG_GPIO_LED_STUBS
|
||||
CONFIG_GREEN_LED
|
||||
|
|
Loading…
Reference in a new issue