layerscape: Disable CONFIG_FMAN_ENET on *aqds* platforms

The *aqds* platforms have not been migrated to be able to enable
CONFIG_DM_ETH with CONFIG_FMAN_ENET. Disable CONFIG_FMAN_ENET on these
platforms.

Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Pramod Kumar <pramod.kumar_1@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-08-09 10:16:22 -04:00
parent adae2ed62d
commit cd9b71c3f6
23 changed files with 15 additions and 35 deletions

View file

@ -671,7 +671,7 @@ void ft_cpu_setup(void *blob, struct bd_info *bd)
"clock-frequency", get_qman_freq(), 1);
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
#ifdef CONFIG_FMAN_ENET
fdt_fixup_fman_firmware(blob);
#endif
#ifdef CONFIG_FSL_PFE

View file

@ -30,8 +30,6 @@
#define EMI1_SLOT4 5
#define EMI2 6
static int mdio_mux[NUM_FM_PORTS];
static const char * const mdio_names[] = {
"LS1043AQDS_MDIO_RGMII1",
"LS1043AQDS_MDIO_RGMII2",
@ -43,7 +41,11 @@ static const char * const mdio_names[] = {
};
/* Map SerDes1 4 lanes to default slot, will be initialized dynamically */
#ifdef CONFIG_FMAN_ENET
static int mdio_mux[NUM_FM_PORTS];
static u8 lane_to_slot[] = {1, 2, 3, 4};
#endif
static const char *ls1043aqds_mdio_name_for_muxval(u8 muxval)
{
@ -75,6 +77,7 @@ struct mii_dev *mii_dev_for_muxval(u8 muxval)
return bus;
}
#ifdef CONFIG_FMAN_ENET
struct ls1043aqds_mdio {
u8 muxval;
struct mii_dev *realbus;
@ -296,7 +299,6 @@ void fdt_fixup_board_enet(void *fdt)
int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
int i, idx, lane, slot, interface;
struct memac_mdio_info dtsec_mdio_info;
struct memac_mdio_info tgec_mdio_info;
@ -493,7 +495,7 @@ int board_eth_init(struct bd_info *bis)
}
cpu_eth_init(bis);
#endif /* CONFIG_FMAN_ENET */
return pci_eth_init(bis);
}
#endif /* CONFIG_FMAN_ENET */

View file

@ -556,10 +556,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
ft_cpu_setup(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
#ifndef CONFIG_DM_ETH
fdt_fixup_fman_ethernet(blob);
#endif
#ifdef CONFIG_FMAN_ENET
fdt_fixup_board_enet(blob);
#endif

View file

@ -27,8 +27,6 @@
#define EMI1_SLOT2 3
#define EMI1_SLOT4 4
static int mdio_mux[NUM_FM_PORTS];
static const char * const mdio_names[] = {
"LS1046AQDS_MDIO_RGMII1",
"LS1046AQDS_MDIO_RGMII2",
@ -39,7 +37,11 @@ static const char * const mdio_names[] = {
};
/* Map SerDes 1 & 2 lanes to default slot. */
#ifdef CONFIG_FMAN_ENET
static int mdio_mux[NUM_FM_PORTS];
static u8 lane_to_slot[] = {1, 1, 1, 1, 0, 4, 0 , 0};
#endif
static const char *ls1046aqds_mdio_name_for_muxval(u8 muxval)
{
@ -71,6 +73,7 @@ struct mii_dev *mii_dev_for_muxval(u8 muxval)
return bus;
}
#ifdef CONFIG_FMAN_ENET
struct ls1046aqds_mdio {
u8 muxval;
struct mii_dev *realbus;
@ -263,7 +266,6 @@ void fdt_fixup_board_enet(void *fdt)
int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_FMAN_ENET
int i, idx, lane, slot, interface;
struct memac_mdio_info dtsec_mdio_info;
struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
@ -423,7 +425,7 @@ int board_eth_init(struct bd_info *bis)
}
cpu_eth_init(bis);
#endif /* CONFIG_FMAN_ENET */
return pci_eth_init(bis);
}
#endif /* CONFIG_FMAN_ENET */

View file

@ -439,10 +439,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
fdt_fixup_memory_banks(blob, base, size, 2);
ft_cpu_setup(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
#ifndef CONFIG_DM_ETH
fdt_fixup_fman_ethernet(blob);
#endif
#ifdef CONFIG_FMAN_ENET
fdt_fixup_board_enet(blob);
#endif

View file

@ -95,7 +95,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -95,7 +95,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -125,7 +125,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -96,7 +96,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -85,7 +85,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -122,7 +122,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -110,7 +110,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -94,7 +94,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -103,7 +103,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -93,7 +93,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -96,7 +96,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -96,7 +96,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -124,7 +124,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -86,7 +86,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x40900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -124,7 +124,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -112,7 +112,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -94,7 +94,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y

View file

@ -104,7 +104,6 @@ CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME_PCI=y
CONFIG_PCI=y