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sandbox64: add support for NVMXIP QSPI

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enable NVMXIP QSPI for sandbox 64-bit

Adding two NVM XIP QSPI storage devices.

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Abdellatif El Khlifi 2023-04-17 10:11:55 +01:00 committed by Tom Rini
parent 4b6d114d6d
commit cc89b7cf41
6 changed files with 39 additions and 4 deletions
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13
arch/sandbox/dts/sandbox64.dts
View file

@ -89,6 +89,19 @@
cs-gpios = <0>, <&gpio_a 0>;
};
nvmxip-qspi1@08000000 {
compatible = "nvmxip,qspi";
reg = /bits/ 64 <0x08000000 0x00200000>;
lba_shift = <9>;
lba = <4096>;
};
nvmxip-qspi2@08200000 {
compatible = "nvmxip,qspi";
reg = /bits/ 64 <0x08200000 0x00100000>;
lba_shift = <9>;
lba = <2048>;
};
};
#include "sandbox.dtsi"

14
arch/sandbox/dts/test.dts
View file

@ -1802,6 +1802,20 @@
compatible = "u-boot,fwu-mdata-gpt";
fwu-mdata-store = <&mmc0>;
};
nvmxip-qspi1@08000000 {
compatible = "nvmxip,qspi";
reg = <0x08000000 0x00200000>;
lba_shift = <9>;
lba = <4096>;
};
nvmxip-qspi2@08200000 {
compatible = "nvmxip,qspi";
reg = <0x08200000 0x00100000>;
lba_shift = <9>;
lba = <2048>;
};
};
#include "sandbox_pmic.dtsi"

1
configs/sandbox64_defconfig
View file

@ -260,3 +260,4 @@ CONFIG_FWU_MULTI_BANK_UPDATE=y
CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_NVMXIP_QSPI=y

2
doc/develop/driver-model/nvmxip.rst
View file

@ -56,7 +56,7 @@ The implementation is generic and can be used by different platforms.
Supported hardware
--------------------------------
Any 64-bit plaform.
Any plaform supporting readq().
Configuration
----------------------

6
doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
View file

@ -16,7 +16,7 @@ If a platform has its own driver, please provide your own compatible
string.
2)
reg = <0x0 0x08000000 0x0 0x00200000>;
reg = /bits/ 64 <0x08000000 0x00200000>;
The start address and size of the flash device. The values give here are an
example (when the cell size is 2).
@ -43,14 +43,14 @@ Example of multiple flash devices
nvmxip-qspi1@08000000 {
compatible = "nvmxip,qspi";
reg = <0x0 0x08000000 0x0 0x00200000>;
reg = /bits/ 64 <0x08000000 0x00200000>;
lba_shift = <9>;
lba = <4096>;
};
nvmxip-qspi2@08200000 {
compatible = "nvmxip,qspi";
reg = <0x0 0x08200000 0x0 0x00100000>;
reg = /bits/ 64 <0x08200000 0x00100000>;
lba_shift = <9>;
lba = <2048>;
};

7
drivers/mtd/nvmxip/nvmxip-uclass.c
View file

@ -9,6 +9,9 @@
#include <common.h>
#include <dm.h>
#include <log.h>
#if CONFIG_IS_ENABLED(SANDBOX64)
#include <asm/test.h>
#endif
#include <linux/bitops.h>
#include "nvmxip.h"
@ -36,6 +39,10 @@ static int nvmxip_post_bind(struct udevice *udev)
char bdev_name[NVMXIP_BLKDEV_NAME_SZ + 1];
int devnum;
#if CONFIG_IS_ENABLED(SANDBOX64)
sandbox_set_enable_memio(true);
#endif
devnum = uclass_id_count(UCLASS_NVMXIP);
snprintf(bdev_name, NVMXIP_BLKDEV_NAME_SZ, "blk#%d", devnum);