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blackfin: convert blackfin board_f and board_r to use generic board init functions

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- move blackfin specific cpu init code from blackfin board.c to cpu.c
- remove blackfin specific board init code and invoke generic board_f fron cpu init entry
- rename section name bss_vma to bss_start in order to match the generic board init code
- add a fake relocate_code function to set up the new stack only

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
This commit is contained in:
Sonic Zhang 2014-07-17 19:00:29 +08:00
parent 9f9a65c80a
commit c49eabeffc
12 changed files with 341 additions and 493 deletions
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3
arch/blackfin/config.mk
View file

@ -20,6 +20,9 @@ CONFIG_BFIN_CPU := $(strip $(CONFIG_BFIN_CPU:"%"=%))
endif
CONFIG_BFIN_BOOT_MODE := $(strip $(CONFIG_BFIN_BOOT_MODE:"%"=%))
# Support generic board on Blackfin
__HAVE_ARCH_GENERIC_BOARD := y
PLATFORM_RELFLAGS += -ffixed-P3 -fomit-frame-pointer -mno-fdpic
LDFLAGS_FINAL += --gc-sections

334
arch/blackfin/cpu/cpu.c
View file

@ -11,17 +11,22 @@
#include <common.h>
#include <command.h>
#include <serial.h>
#include <version.h>
#include <i2c.h>
#include <asm/blackfin.h>
#include <asm/cplb.h>
#include <asm/clock.h>
#include <asm/mach-common/bits/core.h>
#include <asm/mach-common/bits/ebiu.h>
#include <asm/mach-common/bits/trace.h>
#include <asm/serial.h>
#include "cpu.h"
#include "initcode.h"
ulong bfin_poweron_retx;
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_CORE1_RUN) && defined(COREB_L1_CODE_START)
void bfin_core1_start(void)
@ -48,6 +53,252 @@ void bfin_core1_start(void)
}
#endif
__attribute__((always_inline))
static inline void serial_early_puts(const char *s)
{
#ifdef CONFIG_DEBUG_EARLY_SERIAL
serial_puts("Early: ");
serial_puts(s);
#endif
}
static int global_board_data_init(void)
{
#ifndef CONFIG_SYS_GBL_DATA_ADDR
# define CONFIG_SYS_GBL_DATA_ADDR 0
#endif
#ifndef CONFIG_SYS_BD_INFO_ADDR
# define CONFIG_SYS_BD_INFO_ADDR 0
#endif
bd_t *bd;
if (CONFIG_SYS_GBL_DATA_ADDR) {
gd = (gd_t *)(CONFIG_SYS_GBL_DATA_ADDR);
memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE);
} else {
static gd_t _bfin_gd;
gd = &_bfin_gd;
}
if (CONFIG_SYS_BD_INFO_ADDR) {
bd = (bd_t *)(CONFIG_SYS_BD_INFO_ADDR);
memset(bd, 0, GENERATED_BD_INFO_SIZE);
} else {
static bd_t _bfin_bd;
bd = &_bfin_bd;
}
gd->bd = bd;
bd->bi_r_version = version_string;
bd->bi_cpu = __stringify(CONFIG_BFIN_CPU);
bd->bi_board_name = CONFIG_SYS_BOARD;
bd->bi_vco = get_vco();
bd->bi_cclk = get_cclk();
bd->bi_sclk = get_sclk();
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
gd->ram_size = CONFIG_SYS_MAX_RAM_SIZE;
return 0;
}
static void display_global_data(void)
{
bd_t *bd;
#ifndef CONFIG_DEBUG_EARLY_SERIAL
return;
#endif
bd = gd->bd;
printf(" gd: %p\n", gd);
printf(" |-flags: %lx\n", gd->flags);
printf(" |-board_type: %lx\n", gd->arch.board_type);
printf(" |-baudrate: %u\n", gd->baudrate);
printf(" |-have_console: %lx\n", gd->have_console);
printf(" |-ram_size: %lx\n", gd->ram_size);
printf(" |-env_addr: %lx\n", gd->env_addr);
printf(" |-env_valid: %lx\n", gd->env_valid);
printf(" |-jt(%p): %p\n", gd->jt, *(gd->jt));
printf(" \\-bd: %p\n", gd->bd);
printf(" |-bi_boot_params: %lx\n", bd->bi_boot_params);
printf(" |-bi_memstart: %lx\n", bd->bi_memstart);
printf(" |-bi_memsize: %lx\n", bd->bi_memsize);
printf(" |-bi_flashstart: %lx\n", bd->bi_flashstart);
printf(" |-bi_flashsize: %lx\n", bd->bi_flashsize);
printf(" \\-bi_flashoffset: %lx\n", bd->bi_flashoffset);
}
#define CPLB_PAGE_SIZE (4 * 1024 * 1024)
#define CPLB_PAGE_MASK (~(CPLB_PAGE_SIZE - 1))
#if defined(__ADSPBF60x__)
#define CPLB_EX_PAGE_SIZE (16 * 1024 * 1024)
#define CPLB_EX_PAGE_MASK (~(CPLB_EX_PAGE_SIZE - 1))
#else
#define CPLB_EX_PAGE_SIZE CPLB_PAGE_SIZE
#define CPLB_EX_PAGE_MASK CPLB_PAGE_MASK
#endif
void init_cplbtables(void)
{
uint32_t *ICPLB_ADDR, *ICPLB_DATA;
uint32_t *DCPLB_ADDR, *DCPLB_DATA;
uint32_t extern_memory;
size_t i;
void icplb_add(uint32_t addr, uint32_t data)
{
bfin_write32(ICPLB_ADDR + i, addr);
bfin_write32(ICPLB_DATA + i, data);
}
void dcplb_add(uint32_t addr, uint32_t data)
{
bfin_write32(DCPLB_ADDR + i, addr);
bfin_write32(DCPLB_DATA + i, data);
}
/* populate a few common entries ... we'll let
* the memory map and cplb exception handler do
* the rest of the work.
*/
i = 0;
ICPLB_ADDR = (uint32_t *)ICPLB_ADDR0;
ICPLB_DATA = (uint32_t *)ICPLB_DATA0;
DCPLB_ADDR = (uint32_t *)DCPLB_ADDR0;
DCPLB_DATA = (uint32_t *)DCPLB_DATA0;
icplb_add(0xFFA00000, L1_IMEMORY);
dcplb_add(0xFF800000, L1_DMEMORY);
++i;
#if defined(__ADSPBF60x__)
icplb_add(0x0, 0x0);
dcplb_add(CONFIG_SYS_FLASH_BASE, PAGE_SIZE_16MB | CPLB_DIRTY |
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID);
++i;
#endif
if (CONFIG_MEM_SIZE) {
uint32_t mbase = CONFIG_SYS_MONITOR_BASE;
uint32_t mend = mbase + CONFIG_SYS_MONITOR_LEN - 1;
mbase &= CPLB_PAGE_MASK;
mend &= CPLB_PAGE_MASK;
icplb_add(mbase, SDRAM_IKERNEL);
dcplb_add(mbase, SDRAM_DKERNEL);
++i;
/*
* If the monitor crosses a 4 meg boundary, we'll need
* to lock two entries for it. We assume it doesn't
* cross two 4 meg boundaries ...
*/
if (mbase != mend) {
icplb_add(mend, SDRAM_IKERNEL);
dcplb_add(mend, SDRAM_DKERNEL);
++i;
}
}
#ifndef __ADSPBF60x__
icplb_add(0x20000000, SDRAM_INON_CHBL);
dcplb_add(0x20000000, SDRAM_EBIU);
++i;
#endif
/* Add entries for the rest of external RAM up to the bootrom */
extern_memory = 0;
#ifdef CONFIG_DEBUG_NULL_PTR
icplb_add(extern_memory,
(SDRAM_IKERNEL & ~PAGE_SIZE_MASK) | PAGE_SIZE_1KB);
dcplb_add(extern_memory,
(SDRAM_DKERNEL & ~PAGE_SIZE_MASK) | PAGE_SIZE_1KB);
++i;
icplb_add(extern_memory, SDRAM_IKERNEL);
dcplb_add(extern_memory, SDRAM_DKERNEL);
extern_memory += CPLB_PAGE_SIZE;
++i;
#endif
while (i < 16 && extern_memory <
(CONFIG_SYS_MONITOR_BASE & CPLB_EX_PAGE_MASK)) {
icplb_add(extern_memory, SDRAM_IGENERIC);
dcplb_add(extern_memory, SDRAM_DGENERIC);
extern_memory += CPLB_EX_PAGE_SIZE;
++i;
}
while (i < 16) {
icplb_add(0, 0);
dcplb_add(0, 0);
++i;
}
}
int print_cpuinfo(void)
{
char buf[32];
printf("CPU: ADSP %s (Detected Rev: 0.%d) (%s boot)\n",
gd->bd->bi_cpu,
bfin_revid(),
get_bfin_boot_mode(CONFIG_BFIN_BOOT_MODE));
printf("Clock: VCO: %s MHz, ", strmhz(buf, get_vco()));
printf("Core: %s MHz, ", strmhz(buf, get_cclk()));
#if defined(__ADSPBF60x__)
printf("System0: %s MHz, ", strmhz(buf, get_sclk0()));
printf("System1: %s MHz, ", strmhz(buf, get_sclk1()));
printf("Dclk: %s MHz\n", strmhz(buf, get_dclk()));
#else
printf("System: %s MHz\n", strmhz(buf, get_sclk()));
#endif
return 0;
}
int exception_init(void)
{
bfin_write_EVT3(trap);
return 0;
}
int irq_init(void)
{
#ifdef SIC_IMASK0
bfin_write_SIC_IMASK0(0);
bfin_write_SIC_IMASK1(0);
# ifdef SIC_IMASK2
bfin_write_SIC_IMASK2(0);
# endif
#elif defined(SICA_IMASK0)
bfin_write_SICA_IMASK0(0);
bfin_write_SICA_IMASK1(0);
#elif defined(SIC_IMASK)
bfin_write_SIC_IMASK(0);
#endif
/* Set up a dummy NMI handler if needed. */
if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS || ANOMALY_05000219)
bfin_write_EVT2(evt_nmi); /* NMI */
bfin_write_EVT5(evt_default); /* hardware error */
bfin_write_EVT6(evt_default); /* core timer */
bfin_write_EVT7(evt_default);
bfin_write_EVT8(evt_default);
bfin_write_EVT9(evt_default);
bfin_write_EVT10(evt_default);
bfin_write_EVT11(evt_default);
bfin_write_EVT12(evt_default);
bfin_write_EVT13(evt_default);
bfin_write_EVT14(evt_default);
bfin_write_EVT15(evt_default);
bfin_write_ILAT(0);
CSYNC();
/* enable hardware error irq */
irq_flags = 0x3f;
local_irq_enable();
return 0;
}
__attribute__ ((__noreturn__))
void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
{
@ -102,51 +353,62 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
bfin_core1_start();
#endif
serial_early_puts("Board init flash\n");
board_init_f(bootflag);
serial_early_puts("Init global data\n");
global_board_data_init();
board_init_f(0);
/* should not be reached */
while (1);
}
int exception_init(void)
int arch_cpu_init(void)
{
bfin_write_EVT3(trap);
serial_early_puts("Init CPLB tables\n");
init_cplbtables();
serial_early_puts("Exceptions setup\n");
exception_init();
#ifndef CONFIG_ICACHE_OFF
serial_early_puts("Turn on ICACHE\n");
icache_enable();
#endif
#ifndef CONFIG_DCACHE_OFF
serial_early_puts("Turn on DCACHE\n");
dcache_enable();
#endif
#ifdef DEBUG
if (GENERATED_GBL_DATA_SIZE < sizeof(*gd))
hang();
#endif
/* Initialize */
serial_early_puts("IRQ init\n");
irq_init();
return 0;
}
int irq_init(void)
int arch_misc_init(void)
{
#ifdef SIC_IMASK0
bfin_write_SIC_IMASK0(0);
bfin_write_SIC_IMASK1(0);
# ifdef SIC_IMASK2
bfin_write_SIC_IMASK2(0);
# endif
#elif defined(SICA_IMASK0)
bfin_write_SICA_IMASK0(0);
bfin_write_SICA_IMASK1(0);
#elif defined(SIC_IMASK)
bfin_write_SIC_IMASK(0);
#if defined(CONFIG_SYS_I2C)
i2c_reloc_fixup();
#endif
/* Set up a dummy NMI handler if needed. */
if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS || ANOMALY_05000219)
bfin_write_EVT2(evt_nmi); /* NMI */
bfin_write_EVT5(evt_default); /* hardware error */
bfin_write_EVT6(evt_default); /* core timer */
bfin_write_EVT7(evt_default);
bfin_write_EVT8(evt_default);
bfin_write_EVT9(evt_default);
bfin_write_EVT10(evt_default);
bfin_write_EVT11(evt_default);
bfin_write_EVT12(evt_default);
bfin_write_EVT13(evt_default);
bfin_write_EVT14(evt_default);
bfin_write_EVT15(evt_default);
bfin_write_ILAT(0);
CSYNC();
/* enable hardware error irq */
irq_flags = 0x3f;
local_irq_enable();
display_global_data();
if (CONFIG_MEM_SIZE && bfin_os_log_check()) {
puts("\nLog buffer from operating system:\n");
bfin_os_log_dump();
puts("\n");
}
return 0;
}
int interrupt_init(void)
{
return 0;
}

14
arch/blackfin/cpu/start.S
View file

@ -196,8 +196,8 @@ ENTRY(_start)
* takes care of clearing things for us.
*/
serial_early_puts("Zero BSS");
r0.l = __bss_vma;
r0.h = __bss_vma;
r0.l = __bss_start;
r0.h = __bss_start;
r1 = 0 (x);
r2.l = __bss_len;
r2.h = __bss_len;
@ -251,3 +251,13 @@ LENTRY(_get_pc)
#endif
rts;
ENDPROC(_get_pc)
ENTRY(_relocate_code)
/* Fake relocate code. Setup the new stack only */
sp = r0;
fp = sp;
r0 = p3;
r1.h = 0x2000;
r1.l = 0x10;
jump.l _board_init_r
ENDPROC(_relocate_code)

4
arch/blackfin/cpu/u-boot.lds
View file

@ -135,6 +135,8 @@ SECTIONS
*(COMMON)
. = ALIGN(4);
} >ram_data
__bss_vma = ADDR(.bss);
__bss_end = .;
__bss_start = ADDR(.bss);
__bss_len = SIZEOF(.bss);
__init_end = .;
}

4
arch/blackfin/include/asm/config.h
View file

@ -174,4 +174,8 @@
}
#endif
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_ARCH_MISC_INIT
#endif

3
arch/blackfin/include/asm/u-boot.h
View file

@ -25,9 +25,12 @@ typedef struct bd_info {
unsigned long bi_vco;
unsigned long bi_cclk;
unsigned long bi_sclk;
unsigned char bi_enetaddr[6];
} bd_t;
/* For image.h:image_check_target_arch() */
#define IH_ARCH_DEFAULT IH_ARCH_BLACKFIN
int arch_misc_init(void);
#endif /* _U_BOOT_H_ */

7
arch/blackfin/lib/Makefile
View file

@ -9,11 +9,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Unnecessary.
# Use CONFIG_SYS_BOARD instead of BFIN_BOARD_NAME
# and delete this.
ccflags-y += -DBFIN_BOARD_NAME='"$(BOARD)"'
obj-y += ins.o
obj-y += memcmp.o
obj-y += memcpy.o
@ -21,7 +16,6 @@ obj-y += memmove.o
obj-y += memset.o
obj-y += outs.o
obj-$(CONFIG_CMD_KGDB) += __kgdb.o
obj-y += board.o
obj-y += boot.o
obj-y += cache.o
obj-y += clocks.o
@ -30,3 +24,4 @@ obj-$(CONFIG_CMD_KGDB) += kgdb.o
obj-y += muldi3.o
obj-$(CONFIG_HAS_POST) += post.o
obj-y += string.o
obj-y += sections.o

443
arch/blackfin/lib/board.c
View file

@ -1,443 +0,0 @@
/*
* U-boot - board.c First C file to be called contains init routines
*
* Copyright (c) 2005-2008 Analog Devices Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Licensed under the GPL-2 or later.
*/
#include <common.h>
#include <command.h>
#include <stdio_dev.h>
#include <serial.h>
#include <environment.h>
#include <malloc.h>
#include <mmc.h>
#include <net.h>
#include <status_led.h>
#include <version.h>
#include <watchdog.h>
#include <asm/cplb.h>
#include <asm/mach-common/bits/mpu.h>
#include <asm/clock.h>
#include <kgdb.h>
#ifdef CONFIG_CMD_NAND
#include <nand.h> /* cannot even include nand.h if it isnt configured */
#endif
#ifdef CONFIG_BITBANGMII
#include <miiphy.h>
#endif
#if defined(CONFIG_POST)
#include <post.h>
int post_flag;
#endif
#if defined(CONFIG_SYS_I2C)
#include <i2c.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
__attribute__((always_inline))
static inline void serial_early_puts(const char *s)
{
#ifdef CONFIG_DEBUG_EARLY_SERIAL
serial_puts("Early: ");
serial_puts(s);
#endif
}
static int display_banner(void)
{
display_options();
printf("CPU: ADSP %s "
"(Detected Rev: 0.%d) "
"(%s boot)\n",
gd->bd->bi_cpu,
bfin_revid(),
get_bfin_boot_mode(CONFIG_BFIN_BOOT_MODE));
return 0;
}
static int init_baudrate(void)
{
gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
return 0;
}
static void display_global_data(void)
{
bd_t *bd;
#ifndef CONFIG_DEBUG_EARLY_SERIAL
return;
#endif
bd = gd->bd;
printf(" gd: %p\n", gd);
printf(" |-flags: %lx\n", gd->flags);
printf(" |-board_type: %lx\n", gd->arch.board_type);
printf(" |-baudrate: %u\n", gd->baudrate);
printf(" |-have_console: %lx\n", gd->have_console);
printf(" |-ram_size: %lx\n", gd->ram_size);
printf(" |-env_addr: %lx\n", gd->env_addr);
printf(" |-env_valid: %lx\n", gd->env_valid);
printf(" |-jt(%p): %p\n", gd->jt, *(gd->jt));
printf(" \\-bd: %p\n", gd->bd);
printf(" |-bi_boot_params: %lx\n", bd->bi_boot_params);
printf(" |-bi_memstart: %lx\n", bd->bi_memstart);
printf(" |-bi_memsize: %lx\n", bd->bi_memsize);
printf(" |-bi_flashstart: %lx\n", bd->bi_flashstart);
printf(" |-bi_flashsize: %lx\n", bd->bi_flashsize);
printf(" \\-bi_flashoffset: %lx\n", bd->bi_flashoffset);
}
#define CPLB_PAGE_SIZE (4 * 1024 * 1024)
#define CPLB_PAGE_MASK (~(CPLB_PAGE_SIZE - 1))
#if defined(__ADSPBF60x__)
#define CPLB_EX_PAGE_SIZE (16 * 1024 * 1024)
#define CPLB_EX_PAGE_MASK (~(CPLB_EX_PAGE_SIZE - 1))
#else
#define CPLB_EX_PAGE_SIZE CPLB_PAGE_SIZE
#define CPLB_EX_PAGE_MASK CPLB_PAGE_MASK
#endif
void init_cplbtables(void)
{
volatile uint32_t *ICPLB_ADDR, *ICPLB_DATA;
volatile uint32_t *DCPLB_ADDR, *DCPLB_DATA;
uint32_t extern_memory;
size_t i;
void icplb_add(uint32_t addr, uint32_t data)
{
*(ICPLB_ADDR + i) = addr;
*(ICPLB_DATA + i) = data;
}
void dcplb_add(uint32_t addr, uint32_t data)
{
*(DCPLB_ADDR + i) = addr;
*(DCPLB_DATA + i) = data;
}
/* populate a few common entries ... we'll let
* the memory map and cplb exception handler do
* the rest of the work.
*/
i = 0;
ICPLB_ADDR = (uint32_t *)ICPLB_ADDR0;
ICPLB_DATA = (uint32_t *)ICPLB_DATA0;
DCPLB_ADDR = (uint32_t *)DCPLB_ADDR0;
DCPLB_DATA = (uint32_t *)DCPLB_DATA0;
icplb_add(0xFFA00000, L1_IMEMORY);
dcplb_add(0xFF800000, L1_DMEMORY);
++i;
#if defined(__ADSPBF60x__)
icplb_add(0x0, 0x0);
dcplb_add(CONFIG_SYS_FLASH_BASE, PAGE_SIZE_16MB | CPLB_DIRTY |
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID);
++i;
#endif
if (CONFIG_MEM_SIZE) {
uint32_t mbase = CONFIG_SYS_MONITOR_BASE;
uint32_t mend = mbase + CONFIG_SYS_MONITOR_LEN;
mbase &= CPLB_PAGE_MASK;
mend &= CPLB_PAGE_MASK;
icplb_add(mbase, SDRAM_IKERNEL);
dcplb_add(mbase, SDRAM_DKERNEL);
++i;
/*
* If the monitor crosses a 4 meg boundary, we'll need
* to lock two entries for it. We assume it doesn't
* cross two 4 meg boundaries ...
*/
if (mbase != mend) {
icplb_add(mend, SDRAM_IKERNEL);
dcplb_add(mend, SDRAM_DKERNEL);
++i;
}
}
#ifndef __ADSPBF60x__
icplb_add(0x20000000, SDRAM_INON_CHBL);
dcplb_add(0x20000000, SDRAM_EBIU);
++i;
#endif
/* Add entries for the rest of external RAM up to the bootrom */
extern_memory = 0;
#ifdef CONFIG_DEBUG_NULL_PTR
icplb_add(extern_memory, (SDRAM_IKERNEL & ~PAGE_SIZE_MASK) | PAGE_SIZE_1KB);
dcplb_add(extern_memory, (SDRAM_DKERNEL & ~PAGE_SIZE_MASK) | PAGE_SIZE_1KB);
++i;
icplb_add(extern_memory, SDRAM_IKERNEL);
dcplb_add(extern_memory, SDRAM_DKERNEL);
extern_memory += CPLB_PAGE_SIZE;
++i;
#endif
while (i < 16 && extern_memory <
(CONFIG_SYS_MONITOR_BASE & CPLB_EX_PAGE_MASK)) {
icplb_add(extern_memory, SDRAM_IGENERIC);
dcplb_add(extern_memory, SDRAM_DGENERIC);
extern_memory += CPLB_EX_PAGE_SIZE;
++i;
}
while (i < 16) {
icplb_add(0, 0);
dcplb_add(0, 0);
++i;
}
}
static int global_board_data_init(void)
{
#ifndef CONFIG_SYS_GBL_DATA_ADDR
# define CONFIG_SYS_GBL_DATA_ADDR 0
#endif
#ifndef CONFIG_SYS_BD_INFO_ADDR
# define CONFIG_SYS_BD_INFO_ADDR 0
#endif
bd_t *bd;
if (CONFIG_SYS_GBL_DATA_ADDR) {
gd = (gd_t *) (CONFIG_SYS_GBL_DATA_ADDR);
memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE);
} else {
static gd_t _bfin_gd;
gd = &_bfin_gd;
}
if (CONFIG_SYS_BD_INFO_ADDR) {
bd = (bd_t *) (CONFIG_SYS_BD_INFO_ADDR);
memset(bd, 0, GENERATED_BD_INFO_SIZE);
} else {
static bd_t _bfin_bd;
bd = &_bfin_bd;
}
gd->bd = bd;
bd->bi_r_version = version_string;
bd->bi_cpu = __stringify(CONFIG_BFIN_CPU);
bd->bi_board_name = BFIN_BOARD_NAME;
bd->bi_vco = get_vco();
bd->bi_cclk = get_cclk();
bd->bi_sclk = get_sclk();
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
return 0;
}
/*
* All attempts to come up with a "common" initialization sequence
* that works for all boards and architectures failed: some of the
* requirements are just _too_ different. To get rid of the resulting
* mess of board dependend #ifdef'ed code we now make the whole
* initialization sequence configurable to the user.
*
* The requirements for any new initalization function is simple: it
* receives a pointer to the "global data" structure as it's only
* argument, and returns an integer return code, where 0 means
* "continue" and != 0 means "fatal error, hang the system".
*/
extern int watchdog_init(void);
extern int exception_init(void);
extern int irq_init(void);
extern int timer_init(void);
void board_init_f(ulong bootflag)
{
char buf[32];
#ifdef CONFIG_BOARD_EARLY_INIT_F
serial_early_puts("Board early init flash\n");
board_early_init_f();
#endif
serial_early_puts("Init CPLB tables\n");
init_cplbtables();
serial_early_puts("Exceptions setup\n");
exception_init();
#ifndef CONFIG_ICACHE_OFF
serial_early_puts("Turn on ICACHE\n");
icache_enable();
#endif
#ifndef CONFIG_DCACHE_OFF
serial_early_puts("Turn on DCACHE\n");
dcache_enable();
#endif
#ifdef CONFIG_HW_WATCHDOG
serial_early_puts("Setting up external watchdog\n");
hw_watchdog_init();
#endif
#ifdef DEBUG
if (GENERATED_GBL_DATA_SIZE < sizeof(*gd))
hang();
#endif
serial_early_puts("Init global data\n");
global_board_data_init();
/* Initialize */
serial_early_puts("IRQ init\n");
irq_init();
serial_early_puts("Environment init\n");
env_init();
serial_early_puts("Baudrate init\n");
init_baudrate();
serial_early_puts("Serial init\n");
serial_init();
serial_initialize();
serial_early_puts("Console init flash\n");
console_init_f();
serial_early_puts("End of early debugging\n");
display_banner();
checkboard();
timer_init();
printf("Clock: VCO: %s MHz, ", strmhz(buf, get_vco()));
printf("Core: %s MHz, ", strmhz(buf, get_cclk()));
#if defined(__ADSPBF60x__)
printf("System0: %s MHz, ", strmhz(buf, get_sclk0()));
printf("System1: %s MHz, ", strmhz(buf, get_sclk1()));
printf("Dclk: %s MHz\n", strmhz(buf, get_dclk()));
#else
printf("System: %s MHz\n", strmhz(buf, get_sclk()));
#endif
if (CONFIG_MEM_SIZE) {
printf("RAM: ");
print_size(gd->bd->bi_memsize, "\n");
}
#if defined(CONFIG_POST)
post_init_f();
post_bootmode_init();
post_run(NULL, POST_ROM | post_bootmode_get(0));
#endif
board_init_r((gd_t *) gd, 0x20000010);
}
static void board_net_init_r(bd_t *bd)
{
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#ifdef CONFIG_CMD_NET
printf("Net: ");
eth_initialize(bd);
#endif
}
void board_init_r(gd_t * id, ulong dest_addr)
{
bd_t *bd;
gd = id;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
bd = gd->bd;
#if defined(CONFIG_POST)
post_output_backlog();
#endif
/* initialize malloc() area */
mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
#if !defined(CONFIG_SYS_NO_FLASH)
/* Initialize the flash and protect u-boot by default */
extern flash_info_t flash_info[];
puts("Flash: ");
ulong size = flash_init();
print_size(size, "\n");
flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_FLASH_BASE,
CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN - 1,
&flash_info[0]);
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
bd->bi_flashsize = size;
bd->bi_flashoffset = 0;
#else
bd->bi_flashstart = 0;
bd->bi_flashsize = 0;
bd->bi_flashoffset = 0;
#endif
#ifdef CONFIG_CMD_NAND
puts("NAND: ");
nand_init(); /* go init the NAND */
#endif
#ifdef CONFIG_GENERIC_MMC
puts("MMC: ");
mmc_initialize(bd);
#endif
#if defined(CONFIG_SYS_I2C)
i2c_reloc_fixup();
#endif
/* relocate environment function pointers etc. */
env_relocate();
/* Initialize stdio devices */
stdio_init();
jumptable_init();
/* Initialize the console (after the relocation and devices init) */
console_init_r();
#ifdef CONFIG_CMD_KGDB
puts("KGDB: ");
kgdb_init();
#endif
#ifdef CONFIG_STATUS_LED
status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
status_led_set(STATUS_LED_CRASH, STATUS_LED_OFF);
#endif
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
misc_init_r();
#endif
board_net_init_r(bd);
display_global_data();
#if defined(CONFIG_POST)
if (post_flag)
post_run(NULL, POST_RAM | post_bootmode_get(0));
#endif
if (CONFIG_MEM_SIZE && bfin_os_log_check()) {
puts("\nLog buffer from operating system:\n");
bfin_os_log_dump();
puts("\n");
}
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;)
main_loop();
}

11
arch/blackfin/lib/sections.c Normal file
View file

@ -0,0 +1,11 @@
/*
* U-boot - section.c
*
* Copyright (c) 2014 Analog Devices Inc.
*
* Licensed under the GPL-2 or later.
*/
char __bss_start[0] __attribute__((section(".__bss_start")));
char __bss_end[0] __attribute__((section(".__bss_end")));
char __init_end[0] __attribute__((section(".__init_end")));

5
include/configs/bf506f-ezkit.h
View file

@ -56,7 +56,7 @@
/*
* Flash Settings
*/
/*
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_BASE 0x20000000
#define CONFIG_SYS_FLASH_CFI
@ -64,9 +64,8 @@
#define CONFIG_SYS_MAX_FLASH_SECT 71
#define CONFIG_CMD_FLASH
#define CONFIG_MONITOR_IS_IN_RAM
/*
#define CONFIG_SYS_NO_FLASH
*/
#define CONFIG_SYS_NO_FLASH
/*
* SPI Settings

3
include/configs/bf533-stamp.h
View file

@ -98,10 +98,11 @@
*/
#define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ 30000000
/*
#define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_ALL
*/
/*
* Env Storage Settings

3
include/configs/bf538f-ezkit.h
View file

@ -83,10 +83,11 @@
*/
#define CONFIG_BFIN_SPI
#define CONFIG_ENV_SPI_MAX_HZ 30000000
/*
#define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_ALL
*/
/*
* Env Storage Settings