spl/mpc85xx: rename cpu_init_nand.c to spl_minimal.c
There is nothing really NAND-specific about this file. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
This commit is contained in:
parent
510ed3b8fd
commit
b9735cbaeb
8 changed files with 28 additions and 28 deletions
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@ -39,7 +39,7 @@ AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o
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COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
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COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
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@rm -f $(obj)cpu_init_early.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
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$(obj)cpu_init_nand.c:
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@rm -f $(obj)cpu_init_nand.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
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$(obj)spl_minimal.c:
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@rm -f $(obj)spl_minimal.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $(obj)spl_minimal.c
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$(obj)fsl_law.c:
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@rm -f $(obj)fsl_law.c
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@ -39,7 +39,7 @@ AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o
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COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
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COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
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@rm -f $(obj)cpu_init_early.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
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$(obj)cpu_init_nand.c:
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@rm -f $(obj)cpu_init_nand.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
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$(obj)spl_minimal.c:
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@rm -f $(obj)spl_minimal.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $(obj)spl_minimal.c
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$(obj)fsl_law.c:
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@rm -f $(obj)fsl_law.c
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@ -39,7 +39,7 @@ AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o
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COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
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COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
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@rm -f $(obj)cpu_init_early.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
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$(obj)cpu_init_nand.c:
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@rm -f $(obj)cpu_init_nand.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
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$(obj)spl_minimal.c:
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@rm -f $(obj)spl_minimal.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $(obj)spl_minimal.c
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$(obj)fsl_law.c:
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@rm -f $(obj)fsl_law.c
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@ -39,7 +39,7 @@ AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o ticks.o
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COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
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COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_ifc.o ns16550.o tlb.o tlb_table.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
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@rm -f $(obj)cpu_init_early.c
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ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_early.c $(obj)cpu_init_early.c
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$(obj)cpu_init_nand.c:
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@rm -f $(obj)cpu_init_nand.c
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ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_nand.c $(obj)cpu_init_nand.c
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$(obj)spl_minimal.c:
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@rm -f $(obj)spl_minimal.c
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ln -sf $(SRCTREE)/$(CPUDIR)/spl_minimal.c $(obj)spl_minimal.c
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$(obj)fsl_law.c:
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@rm -f $(obj)fsl_law.c
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@ -34,7 +34,7 @@ AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o
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COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
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COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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@ -75,9 +75,9 @@ $(obj)cpu_init_early.c:
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@rm -f $(obj)cpu_init_early.c
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ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_early.c $(obj)cpu_init_early.c
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$(obj)cpu_init_nand.c:
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@rm -f $(obj)cpu_init_nand.c
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ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_nand.c $(obj)cpu_init_nand.c
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$(obj)spl_minimal.c:
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@rm -f $(obj)spl_minimal.c
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ln -sf $(SRCTREE)/$(CPUDIR)/spl_minimal.c $(obj)spl_minimal.c
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$(obj)fsl_law.c:
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@rm -f $(obj)fsl_law.c
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@ -39,7 +39,7 @@ AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o
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COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
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COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
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@rm -f $(obj)cpu_init_early.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
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$(obj)cpu_init_nand.c:
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@rm -f $(obj)cpu_init_nand.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
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$(obj)spl_minimal.c:
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@rm -f $(obj)spl_minimal.c
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ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $(obj)spl_minimal.c
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$(obj)fsl_law.c:
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@rm -f $(obj)fsl_law.c
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@ -39,7 +39,7 @@ AFLAGS += -DCONFIG_NAND_SPL
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CFLAGS += -DCONFIG_NAND_SPL
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SOBJS = start.o resetvec.o
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COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
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COBJS = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
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nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
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SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
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@ -79,9 +79,9 @@ $(obj)cpu_init_early.c:
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@rm -f $(obj)cpu_init_early.c
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ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_early.c $(obj)cpu_init_early.c
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$(obj)cpu_init_nand.c:
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@rm -f $(obj)cpu_init_nand.c
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ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_nand.c $(obj)cpu_init_nand.c
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$(obj)spl_minimal.c:
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@rm -f $(obj)spl_minimal.c
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ln -sf $(SRCTREE)/$(CPUDIR)/spl_minimal.c $(obj)spl_minimal.c
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$(obj)fsl_law.c:
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@rm -f $(obj)fsl_law.c
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