am33xx: Move the call to ddr_pll_config, make it take the frequency
Depending on if we have DDR2 or DDR3 on the board we will need to call ddr_pll_config with a different value. This call can be delayed slightly to the point where we know which type of memory we have. Signed-off-by: Tom Rini <trini@ti.com>
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3 changed files with 5 additions and 3 deletions
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@ -246,7 +246,7 @@ static void per_pll_config(void)
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;
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}
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static void ddr_pll_config(void)
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void ddr_pll_config(unsigned int ddrpll_m)
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{
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u32 clkmode, clksel, div_m2;
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@ -264,7 +264,7 @@ static void ddr_pll_config(void)
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;
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clksel = clksel & (~CLK_SEL_MASK);
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clksel = clksel | ((DDRPLL_M << CLK_SEL_SHIFT) | DDRPLL_N);
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clksel = clksel | ((ddrpll_m << CLK_SEL_SHIFT) | DDRPLL_N);
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writel(clksel, &cmwkup->clkseldpllddr);
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div_m2 = div_m2 & CLK_DIV_SEL;
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@ -298,7 +298,6 @@ void pll_init()
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mpu_pll_config();
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core_pll_config();
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per_pll_config();
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ddr_pll_config();
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/* Enable the required interconnect clocks */
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enable_interface_clocks();
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@ -21,6 +21,7 @@
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#include <asm/arch/ddr_defs.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/io.h>
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#include <asm/emif.h>
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@ -150,6 +151,7 @@ void config_ddr(short ddr_type)
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enable_emif_clocks();
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if (ddr_type == EMIF_REG_SDRAM_TYPE_DDR2) {
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ddr_pll_config(266);
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config_vtp();
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config_cmd_ctrl(&ddr2_cmd_ctrl_data);
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@ -30,4 +30,5 @@ int print_cpuinfo(void);
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u32 get_device_type(void);
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void setup_clocks_for_console(void);
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void ddr_pll_config(unsigned int ddrpll_M);
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#endif
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