Merge git://git.denx.de/u-boot-i2c
This commit is contained in:
commit
b24065c4ef
34 changed files with 43 additions and 38 deletions
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@ -22,6 +22,7 @@ config OMAP34XX
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imply SPL_NAND_SUPPORT
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imply SPL_POWER_SUPPORT
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imply SPL_SERIAL_SUPPORT
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imply SYS_I2C_OMAP24XX
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imply SYS_THUMB_BUILD
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imply TWL4030_POWER
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@ -40,6 +41,7 @@ config OMAP44XX
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imply SPL_NAND_SUPPORT
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imply SPL_POWER_SUPPORT
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imply SPL_SERIAL_SUPPORT
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imply SYS_I2C_OMAP24XX
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imply SYS_THUMB_BUILD
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config OMAP54XX
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@ -59,6 +61,7 @@ config OMAP54XX
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imply SPL_NAND_SUPPORT
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imply SPL_POWER_SUPPORT
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imply SPL_SERIAL_SUPPORT
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imply SYS_I2C_OMAP24XX
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config TI814X
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bool "TI814X SoC"
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@ -82,6 +85,7 @@ config AM43XX
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imply SPL_OF_TRANSLATE
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imply SPL_SEPARATE_BSS
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imply SPL_SYS_MALLOC_SIMPLE
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imply SYS_I2C_OMAP24XX
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imply SYS_THUMB_BUILD
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help
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Support for AM43xx SOC from Texas Instruments.
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@ -92,6 +96,7 @@ config AM43XX
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config AM33XX
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bool "AM33XX SoC"
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imply SYS_I2C_OMAP24XX
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imply SYS_THUMB_BUILD
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imply USE_TINY_PRINTF
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help
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@ -772,7 +772,7 @@ void per_clocks_enable(void)
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setbits_le32(&prcm_base->iclken_per, 0x00020000);
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#endif
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#ifdef CONFIG_SYS_I2C_OMAP34XX
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#ifdef CONFIG_SYS_I2C_OMAP24XX
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/* Turn on all 3 I2C clocks */
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setbits_le32(&prcm_base->fclken1_core, 0x00038000);
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setbits_le32(&prcm_base->iclken1_core, 0x00038000); /* I2C1,2,3 = on */
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@ -398,7 +398,7 @@ void board_mmc_power_init(void)
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}
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#endif
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#ifdef CONFIG_SYS_I2C_OMAP34XX
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#ifdef CONFIG_SYS_I2C_OMAP24XX
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/*
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* Routine: reset_net_chip
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* Description: reset the Ethernet controller via TPS65930 GPIO
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@ -105,7 +105,7 @@ int misc_init_r(void)
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volatile unsigned int ctr;
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u32 reset;
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#ifdef CONFIG_SYS_I2C_OMAP34XX
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#ifdef CONFIG_SYS_I2C_OMAP24XX
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
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#endif
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@ -43,7 +43,7 @@ int board_init(void)
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*/
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int misc_init_r(void)
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{
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#ifdef CONFIG_SYS_I2C_OMAP34XX
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#ifdef CONFIG_SYS_I2C_OMAP24XX
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
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#endif
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@ -147,7 +147,7 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
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int misc_init_r(void)
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{
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#ifdef CONFIG_SYS_I2C_OMAP34XX
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#ifdef CONFIG_SYS_I2C_OMAP24XX
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
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#endif
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@ -39,6 +39,7 @@ CONFIG_OF_CONTROL=y
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CONFIG_DM=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_OMAP24XX=y
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CONFIG_MMC_OMAP_HS=y
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CONFIG_SYS_NS16550=y
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# CONFIG_USE_PRIVATE_LIBGCC is not set
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@ -145,6 +145,12 @@ config SYS_I2C_MXC
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channels and operating on standard mode upto 100 kbits/s and fast
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mode upto 400 kbits/s.
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config SYS_I2C_OMAP24XX
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bool "TI OMAP2+ I2C driver"
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depends on ARCH_OMAP2PLUS
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help
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Add support for the OMAP2+ I2C driver.
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config SYS_I2C_ROCKCHIP
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bool "Rockchip I2C driver"
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depends on DM_I2C
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@ -31,7 +31,6 @@ obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
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obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
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obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
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obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
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obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
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obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
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obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o
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obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o
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@ -199,7 +199,7 @@ static int at91_i2c_enable_clk(struct udevice *dev)
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return 0;
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}
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static int at91_i2c_probe(struct udevice *dev, uint chip, uint chip_flags)
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static int at91_i2c_probe_chip(struct udevice *dev, uint chip, uint chip_flags)
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{
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struct at91_i2c_bus *bus = dev_get_priv(dev);
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struct at91_i2c_regs *reg = bus->regs;
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@ -254,11 +254,32 @@ static int at91_i2c_ofdata_to_platdata(struct udevice *dev)
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static const struct dm_i2c_ops at91_i2c_ops = {
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.xfer = at91_i2c_xfer,
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.probe_chip = at91_i2c_probe,
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.probe_chip = at91_i2c_probe_chip,
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.set_bus_speed = at91_i2c_set_bus_speed,
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.get_bus_speed = at91_i2c_get_bus_speed,
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};
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static int at91_i2c_probe(struct udevice *dev)
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{
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struct at91_i2c_bus *bus = dev_get_priv(dev);
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struct at91_i2c_regs *reg = bus->regs;
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int ret;
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ret = at91_i2c_enable_clk(dev);
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if (ret)
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return ret;
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writel(TWI_CR_SWRST, ®->cr);
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at91_calc_i2c_clock(dev, bus->clock_frequency);
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writel(bus->cwgr_val, ®->cwgr);
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writel(TWI_CR_MSEN, ®->cr);
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writel(TWI_CR_SVDIS, ®->cr);
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return 0;
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}
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static const struct at91_i2c_pdata at91rm9200_config = {
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.clk_max_div = 5,
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.clk_offset = 3,
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@ -315,6 +336,7 @@ U_BOOT_DRIVER(i2c_at91) = {
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.name = "i2c_at91",
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.id = UCLASS_I2C,
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.of_match = at91_i2c_ids,
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.probe = at91_i2c_probe,
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.ofdata_to_platdata = at91_i2c_ofdata_to_platdata,
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.per_child_auto_alloc_size = sizeof(struct dm_i2c_chip),
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.priv_auto_alloc_size = sizeof(struct at91_i2c_bus),
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@ -374,7 +374,8 @@ static void __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)
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/* Disable i2c */
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dw_i2c_enable(i2c_base, false);
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writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_base->ic_con);
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writel(IC_CON_SD | IC_CON_RE | IC_CON_SPD_FS | IC_CON_MM,
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&i2c_base->ic_con);
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writel(IC_RX_TL, &i2c_base->ic_rx_tl);
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writel(IC_TX_TL, &i2c_base->ic_tx_tl);
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writel(IC_STOP_DET, &i2c_base->ic_intr_mask);
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@ -103,7 +103,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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/*
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* Board NAND Info.
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@ -91,7 +91,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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/* Ethernet */
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#define CONFIG_DRIVER_TI_EMAC
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@ -72,7 +72,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP24XX
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/*
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* Our platforms make use of SPL to initalize the hardware (primarily
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@ -93,7 +93,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_I2C_EEPROM_BUS 0
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@ -101,7 +101,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_I2C_EEPROM_BUS 0
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@ -17,7 +17,6 @@
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#include <configs/ti_omap5_common.h>
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/* EEPROM related defines */
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_I2C_EEPROM_BUS 0
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@ -65,8 +65,6 @@
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#undef CONFIG_OMAP3_SPI
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/* I2C */
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#undef CONFIG_SYS_I2C_OMAP24XX
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#define CONFIG_SYS_I2C_OMAP34XX
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/* TWL4030 */
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#define CONFIG_TWL4030_LED 1
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@ -60,7 +60,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP24XX
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#define CONFIG_I2C_MULTI_BUS
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/*
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@ -86,7 +86,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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/* RTC */
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#define CONFIG_RTC_DS1337
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@ -112,7 +112,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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/*
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* TWL4030
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@ -143,7 +143,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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/*
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* PISMO support
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@ -53,7 +53,6 @@
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#define CONFIG_USB_OMAP3
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/* I2C */
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
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/* USB */
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@ -34,7 +34,6 @@
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
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/* I2C Support */
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#define CONFIG_SYS_I2C_OMAP34XX
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/* TWL4030 LED */
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#define CONFIG_TWL4030_LED
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@ -29,9 +29,6 @@
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* Hardware drivers
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*/
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/* I2C Support */
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#define CONFIG_SYS_I2C_OMAP34XX
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/* TWL4030 LED */
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#define CONFIG_TWL4030_LED
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@ -63,9 +63,6 @@
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#endif
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#endif
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#undef CONFIG_SYS_I2C_OMAP24XX
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#define CONFIG_SYS_I2C_OMAP34XX
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/*
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* TWL4030
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*/
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@ -104,7 +104,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP24XX
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/* Defines for SPL */
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#define CONFIG_SPL_FRAMEWORK
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@ -62,7 +62,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_I2C_MULTI_BUS
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/*
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@ -71,7 +71,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
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@ -69,7 +69,6 @@
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"4m(kernel),-(fs)"
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_OMAP34XX
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_I2C_MULTI_BUS
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@ -15,7 +15,6 @@
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/* I2C IP block */
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP24XX
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/* SPI IP Block */
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#define CONFIG_OMAP3_SPI
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@ -150,7 +150,6 @@
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#ifdef CONFIG_SPL_BUILD
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/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
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#undef CONFIG_SYS_I2C
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#undef CONFIG_SYS_I2C_OMAP24XX
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#endif
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#endif /* __CONFIG_TI_OMAP4_COMMON_H */
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@ -62,7 +62,6 @@
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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/* EEPROM */
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@ -3530,8 +3530,6 @@ CONFIG_SYS_I2C_MXC_I2C4
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CONFIG_SYS_I2C_NCT72_ADDR
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CONFIG_SYS_I2C_NOPROBES
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CONFIG_SYS_I2C_OFFSET
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CONFIG_SYS_I2C_OMAP24XX
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CONFIG_SYS_I2C_OMAP34XX
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CONFIG_SYS_I2C_PCA953X_ADDR
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CONFIG_SYS_I2C_PCA953X_ADDR0
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CONFIG_SYS_I2C_PCA953X_ADDR1
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