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mips: mt7628: fix ddr_type for MT7688KN

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The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.

This patch fixes an issue that mt7628_ddr_pad_ldo_config() may be passed
with a wrong ddr_type in MT7688KN.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Weijie Gao 2021-02-23 15:12:44 +08:00 committed by Daniel Schwierzeck
parent 42b5143210
commit a9961e5acd
1 changed files with 3 additions and 3 deletions
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6
arch/mips/mach-mtmips/mt7628/ddr.c
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@ -140,6 +140,9 @@ void mt7628_ddr_init(void)
lspd = readl(sysc + SYSCTL_CLKCFG0_REG) &
(CPU_PLL_FROM_BBP | CPU_PLL_FROM_XTAL);
if (pkg_type == PKG_ID_KN)
ddr_type = DRAM_DDR1;
mt7628_memc_reset(1);
__udelay(200);
@ -152,9 +155,6 @@ void mt7628_ddr_init(void)
param.memsize = 0;
param.bus_width = 0;
if (pkg_type == PKG_ID_KN)
ddr_type = DRAM_DDR1;
if (ddr_type == DRAM_DDR1) {
if (lspd)
param.cfgs = ddr1_cfgs_160mhz;