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x86: Convert to use driver model pci on queensbay/crownbay

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Move to driver model pci for Intel queensbay/crownbay.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Bin Meng 2015-07-19 00:20:07 +08:00 committed by Simon Glass
parent d11d9ef157
commit a277194341
5 changed files with 6 additions and 53 deletions
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1
arch/x86/cpu/queensbay/Makefile
View file

@ -6,4 +6,3 @@
obj-y += fsp_configs.o obj-y += fsp_configs.o
obj-y += tnc.o topcliff.o obj-y += tnc.o topcliff.o
obj-$(CONFIG_PCI) += tnc_pci.o

5
arch/x86/cpu/queensbay/tnc.c
View file

@ -25,7 +25,6 @@ static void unprotect_spi_flash(void)
int arch_cpu_init(void) int arch_cpu_init(void)
{ {
struct pci_controller *hose;
int ret; int ret;
post_code(POST_CPU_INIT); post_code(POST_CPU_INIT);
@ -37,10 +36,6 @@ int arch_cpu_init(void)
if (ret) if (ret)
return ret; return ret;
ret = pci_early_init_hose(&hose);
if (ret)
return ret;
unprotect_spi_flash(); unprotect_spi_flash();
return 0; return 0;

46
arch/x86/cpu/queensbay/tnc_pci.c
View file

@ -1,46 +0,0 @@
/*
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <pci.h>
#include <asm/pci.h>
#include <asm/fsp/fsp_support.h>
DECLARE_GLOBAL_DATA_PTR;
void board_pci_setup_hose(struct pci_controller *hose)
{
hose->first_busno = 0;
hose->last_busno = 0;
/* PCI memory space */
pci_set_region(hose->regions + 0,
CONFIG_PCI_MEM_BUS,
CONFIG_PCI_MEM_PHYS,
CONFIG_PCI_MEM_SIZE,
PCI_REGION_MEM);
/* PCI IO space */
pci_set_region(hose->regions + 1,
CONFIG_PCI_IO_BUS,
CONFIG_PCI_IO_PHYS,
CONFIG_PCI_IO_SIZE,
PCI_REGION_IO);
pci_set_region(hose->regions + 2,
CONFIG_PCI_PREF_BUS,
CONFIG_PCI_PREF_PHYS,
CONFIG_PCI_PREF_SIZE,
PCI_REGION_PREFETCH);
pci_set_region(hose->regions + 3,
0,
0,
gd->ram_size,
PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
hose->region_count = 4;
}

6
arch/x86/dts/crownbay.dts
View file

@ -90,8 +90,12 @@
pci { pci {
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
compatible = "intel,pci"; compatible = "pci-x86";
device_type = "pci"; device_type = "pci";
u-boot,dm-pre-reloc;
ranges = <0x02000000 0x0 0x40000000 0x40000000 0 0x80000000
0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
0x01000000 0x0 0x2000 0x2000 0 0xe000>;
pcie@17,0 { pcie@17,0 {
#address-cells = <3>; #address-cells = <3>;

1
configs/crownbay_defconfig
View file

@ -17,6 +17,7 @@ CONFIG_BOOTSTAGE_REPORT=y
CONFIG_CMD_BOOTSTAGE=y CONFIG_CMD_BOOTSTAGE=y
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_CPU=y CONFIG_CPU=y
CONFIG_DM_PCI=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_VIDEO_VESA=y CONFIG_VIDEO_VESA=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y