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ARM: dts: sun8i: V3/V3s/S3: Sync from Linux v5.18-rc1

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Copy the devicetree source for the V3(s)/S3 SoCs and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetrees:
 - sun8i-s3-elimo-initium.dts
 - sun8i-v3-sl631-imx179.dts

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
This commit is contained in:
Samuel Holland 2022-04-27 15:31:28 -05:00 committed by Andre Przywara
parent 2c597855aa
commit 94539ab840
9 changed files with 358 additions and 26 deletions
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2
arch/arm/dts/Makefile
View file

@ -669,7 +669,9 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-v40-bananapi-m2-berry.dtb
dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-s3-elimo-initium.dtb \
sun8i-s3-pinecube.dtb \
sun8i-v3-sl631-imx179.dtb \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-bananapi-m2-plus.dtb \

44
arch/arm/dts/sun8i-s3-elimo-impetus.dtsi Normal file
View file

@ -0,0 +1,44 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2020 Matteo Scordino <matteo@elimo.io>
*/
/dts-v1/;
#include "sun8i-v3.dtsi"
#include "sunxi-common-regulators.dtsi"
/ {
model = "Elimo Impetus SoM";
compatible = "elimo,impetus", "sochip,s3", "allwinner,sun8i-v3";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&mmc0 {
broken-cd;
bus-width = <4>;
vmmc-supply = <&reg_vcc3v3>;
status = "okay";
};
&uart0 {
pinctrl-0 = <&uart0_pb_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
status = "okay";
};

29
arch/arm/dts/sun8i-s3-elimo-initium.dts Normal file
View file

@ -0,0 +1,29 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2020 Matteo Scordino <matteo@elimo.io>
*/
/dts-v1/;
#include "sun8i-s3-elimo-impetus.dtsi"
/ {
model = "Elimo Initium";
compatible = "elimo,initium", "elimo,impetus", "sochip,s3",
"allwinner,sun8i-v3";
aliases {
serial1 = &uart1;
};
};
&uart1 {
pinctrl-0 = <&uart1_pg_pins>;
pinctrl-names = "default";
status = "okay";
};
&emac {
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
status = "okay";
};

13
arch/arm/dts/sun8i-s3-pinecube.dts
View file

@ -10,7 +10,7 @@
/ {
model = "PineCube IP Camera";
compatible = "pine64,pinecube", "allwinner,sun8i-s3";
compatible = "pine64,pinecube", "sochip,s3", "allwinner,sun8i-v3";
aliases {
serial0 = &uart2;
@ -64,9 +64,6 @@
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
csi1_ep: endpoint {
remote-endpoint = <&ov5640_ep>;
bus-width = <8>;
@ -88,13 +85,9 @@
status = "okay";
axp209: pmic@34 {
compatible = "x-powers,axp203",
"x-powers,axp209";
reg = <0x34>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};

12
arch/arm/dts/sun8i-v3-sl631-imx179.dts Normal file
View file

@ -0,0 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
* Copyright 2020 Paul Kocialkowski <contact@paulk.fr>
*/
#include "sun8i-v3-sl631.dtsi"
/ {
model = "SL631 Action Camera with IMX179";
compatible = "allwinner,sl631-imx179", "allwinner,sl631",
"allwinner,sun8i-v3";
};

138
arch/arm/dts/sun8i-v3-sl631.dtsi Normal file
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@ -0,0 +1,138 @@
// SPDX-License-Identifier: (GPL-2.0+ OR X11)
/*
* Copyright 2020 Paul Kocialkowski <contact@paulk.fr>
*/
/dts-v1/;
#include "sun8i-v3.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "SL631 Action Camera";
compatible = "allwinner,sl631", "allwinner,sun8i-v3";
aliases {
serial0 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&i2c0 {
status = "okay";
axp209: pmic@34 {
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pb_pins>;
status = "okay";
};
&lradc {
vref-supply = <&reg_ldo2>;
status = "okay";
button-174 {
label = "Down";
linux,code = <KEY_DOWN>;
channel = <0>;
voltage = <174603>;
};
button-384 {
label = "Up";
linux,code = <KEY_UP>;
channel = <0>;
voltage = <384126>;
};
button-593 {
label = "OK";
linux,code = <KEY_OK>;
channel = <0>;
voltage = <593650>;
};
};
&mmc0 {
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
bus-width = <4>;
vmmc-supply = <&reg_dcdc3>;
status = "okay";
};
&pio {
vcc-pd-supply = <&reg_dcdc3>;
vcc-pe-supply = <&reg_dcdc3>;
};
#include "axp209.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <1250000>;
regulator-name = "vdd-sys-cpu";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vdd-3v3";
};
&reg_ldo1 {
regulator-name = "vdd-rtc";
};
&reg_ldo2 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
&spi0 {
status = "okay";
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
};
};
&uart1 {
pinctrl-0 = <&uart1_pg_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
status = "okay";
};

36
arch/arm/dts/sun8i-v3.dtsi
View file

@ -1,14 +1,40 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
* Copyright (C) 2021 Tobias Schramm <t.schramm@manjaro.org>
*/
#include "sun8i-v3s.dtsi"
/ {
soc {
i2s0: i2s@1c22000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-v3-i2s",
"allwinner,sun8i-h3-i2s";
reg = <0x01c22000 0x400>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
clock-names = "apb", "mod";
dmas = <&dma 3>, <&dma 3>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&i2s0_pins>;
resets = <&ccu RST_BUS_I2S0>;
status = "disabled";
};
};
};
&ccu {
compatible = "allwinner,sun8i-v3-ccu";
};
&codec_analog {
compatible = "allwinner,sun8i-v3-codec-analog",
"allwinner,sun8i-h3-codec-analog";
};
&emac {
/delete-property/ phy-handle;
/delete-property/ phy-mode;
@ -24,4 +50,14 @@
&pio {
compatible = "allwinner,sun8i-v3-pinctrl";
i2s0_pins: i2s0-pins {
pins = "PG10", "PG11", "PG12", "PG13";
function = "i2s";
};
uart1_pg_pins: uart1-pg-pins {
pins = "PG6", "PG7";
function = "uart1";
};
};

17
arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts
View file

@ -49,16 +49,18 @@
compatible = "licheepi,licheepi-zero-dock", "licheepi,licheepi-zero",
"allwinner,sun8i-v3s";
aliases {
ethernet0 = &emac;
};
leds {
/* The LEDs use PG0~2 pins, which conflict with MMC1 */
status = "disabled";
};
};
&mmc1 {
broken-cd;
bus-width = <4>;
vmmc-supply = <&reg_vcc3v3>;
&emac {
allwinner,leds-active-low;
status = "okay";
};
@ -94,3 +96,10 @@
voltage = <800000>;
};
};
&mmc1 {
broken-cd;
bus-width = <4>;
vmmc-supply = <&reg_vcc3v3>;
status = "okay";
};

93
arch/arm/dts/sun8i-v3s.dtsi
View file

@ -1,5 +1,6 @@
/*
* Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
* Copyright (C) 2021 Tobias Schramm <t.schramm@manjaro.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@ -157,12 +158,30 @@
syscon: system-control@1c00000 {
compatible = "allwinner,sun8i-v3s-system-control",
"allwinner,sun8i-h3-system-control";
reg = <0x01c00000 0x1000>;
reg = <0x01c00000 0xd0>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
};
nmi_intc: interrupt-controller@1c000d0 {
compatible = "allwinner,sun8i-v3s-nmi",
"allwinner,sun9i-a80-nmi";
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x01c000d0 0x0c>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
dma: dma-controller@1c02000 {
compatible = "allwinner,sun8i-v3s-dma";
reg = <0x01c02000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_DMA>;
resets = <&ccu RST_BUS_DMA>;
#dma-cells = <1>;
};
tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,sun8i-v3s-tcon";
reg = <0x01c0c000 0x1000>;
@ -266,6 +285,8 @@
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
clock-names = "ahb", "mod";
dmas = <&dma 16>, <&dma 16>;
dma-names = "rx", "tx";
resets = <&ccu RST_BUS_CE>;
reset-names = "ahb";
};
@ -328,6 +349,12 @@
interrupt-controller;
#interrupt-cells = <3>;
/omit-if-no-ref/
csi0_mclk_pin: csi0-mclk-pin {
pins = "PE20";
function = "csi_mipi";
};
/omit-if-no-ref/
csi1_8bit_pins: csi1-8bit-pins {
pins = "PE0", "PE2", "PE3", "PE8", "PE9",
@ -347,6 +374,12 @@
function = "i2c0";
};
/omit-if-no-ref/
i2c1_pb_pins: i2c1-pb-pins {
pins = "PB8", "PB9";
function = "i2c1";
};
/omit-if-no-ref/
i2c1_pe_pins: i2c1-pe-pins {
pins = "PE21", "PE22";
@ -401,6 +434,15 @@
clocks = <&osc24M>;
};
pwm: pwm@1c21400 {
compatible = "allwinner,sun8i-v3s-pwm",
"allwinner,sun7i-a20-pwm";
reg = <0x01c21400 0xc>;
clocks = <&osc24M>;
#pwm-cells = <3>;
status = "disabled";
};
lradc: lradc@1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x400>;
@ -408,6 +450,25 @@
status = "disabled";
};
codec: codec@1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-v3s-codec";
reg = <0x01c22c00 0x400>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
clock-names = "apb", "codec";
resets = <&ccu RST_BUS_CODEC>;
dmas = <&dma 15>, <&dma 15>;
dma-names = "rx", "tx";
allwinner,codec-analog-controls = <&codec_analog>;
status = "disabled";
};
codec_analog: codec-analog@1c23000 {
compatible = "allwinner,sun8i-v3s-codec-analog";
reg = <0x01c23000 0x4>;
};
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
@ -415,6 +476,8 @@
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "rx", "tx";
resets = <&ccu RST_BUS_UART0>;
status = "disabled";
};
@ -426,6 +489,8 @@
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "rx", "tx";
resets = <&ccu RST_BUS_UART1>;
status = "disabled";
};
@ -437,6 +502,8 @@
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "rx", "tx";
resets = <&ccu RST_BUS_UART2>;
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";
@ -516,6 +583,8 @@
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
dmas = <&dma 23>, <&dma 23>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
resets = <&ccu RST_BUS_SPI0>;
@ -524,6 +593,17 @@
#size-cells = <0>;
};
gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x2000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
csi1: camera@1cb4000 {
compatible = "allwinner,sun8i-v3s-csi";
reg = <0x01cb4000 0x3000>;
@ -535,16 +615,5 @@
resets = <&ccu RST_BUS_CSI>;
status = "disabled";
};
gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
<0x01c82000 0x1000>,
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
};
};