rockchip: otp: Refactor to use driver data and ops
Refactor the driver to use driver data and ops to simplify handling of SoCs that require a unique read op. Use readl_poll_sleep_timeout instead of a custom poll loop, and add validation of input parameter to main read op. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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15b2d1fb72
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8fa1870e11
1 changed files with 43 additions and 40 deletions
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@ -5,10 +5,10 @@
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#include <common.h>
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#include <asm/io.h>
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#include <command.h>
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#include <dm.h>
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/iopoll.h>
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#include <misc.h>
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/* OTP Register Offsets */
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@ -49,35 +49,31 @@
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struct rockchip_otp_plat {
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void __iomem *base;
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unsigned long secure_conf_base;
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unsigned long otp_mask_base;
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};
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static int rockchip_otp_wait_status(struct rockchip_otp_plat *otp,
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u32 flag)
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struct rockchip_otp_data {
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int (*read)(struct udevice *dev, int offset, void *buf, int size);
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int size;
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};
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static int rockchip_otp_poll_timeout(struct rockchip_otp_plat *otp, u32 flag)
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{
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int delay = OTPC_TIMEOUT;
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u32 status;
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int ret;
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while (!(readl(otp->base + OTPC_INT_STATUS) & flag)) {
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udelay(1);
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delay--;
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if (delay <= 0) {
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printf("%s: wait init status timeout\n", __func__);
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return -ETIMEDOUT;
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}
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}
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ret = readl_poll_sleep_timeout(otp->base + OTPC_INT_STATUS, status,
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(status & flag), 1, OTPC_TIMEOUT);
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if (ret)
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return ret;
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/* clean int status */
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/* Clear int flag */
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writel(flag, otp->base + OTPC_INT_STATUS);
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return 0;
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}
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static int rockchip_otp_ecc_enable(struct rockchip_otp_plat *otp,
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bool enable)
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static int rockchip_otp_ecc_enable(struct rockchip_otp_plat *otp, bool enable)
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{
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int ret = 0;
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writel(SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT),
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otp->base + OTPC_SBPI_CTRL);
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@ -92,11 +88,7 @@ static int rockchip_otp_ecc_enable(struct rockchip_otp_plat *otp,
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writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
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ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
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if (ret < 0)
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printf("%s timeout during ecc_enable\n", __func__);
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return ret;
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return rockchip_otp_poll_timeout(otp, OTPC_SBPI_DONE);
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}
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static int rockchip_px30_otp_read(struct udevice *dev, int offset,
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@ -104,29 +96,26 @@ static int rockchip_px30_otp_read(struct udevice *dev, int offset,
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{
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struct rockchip_otp_plat *otp = dev_get_plat(dev);
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u8 *buffer = buf;
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int ret = 0;
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int ret;
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ret = rockchip_otp_ecc_enable(otp, false);
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if (ret < 0) {
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printf("%s rockchip_otp_ecc_enable err\n", __func__);
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if (ret)
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return ret;
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}
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writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL);
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udelay(5);
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while (size--) {
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writel(offset++ | OTPC_USER_ADDR_MASK,
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otp->base + OTPC_USER_ADDR);
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writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
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otp->base + OTPC_USER_ENABLE);
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ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
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if (ret < 0) {
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printf("%s timeout during read setup\n", __func__);
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ret = rockchip_otp_poll_timeout(otp, OTPC_USER_DONE);
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if (ret)
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goto read_end;
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}
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*buffer++ = readb(otp->base + OTPC_USER_Q);
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*buffer++ = (u8)(readl(otp->base + OTPC_USER_Q) & 0xFF);
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}
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read_end:
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@ -138,7 +127,16 @@ read_end:
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static int rockchip_otp_read(struct udevice *dev, int offset,
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void *buf, int size)
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{
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return rockchip_px30_otp_read(dev, offset, buf, size);
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const struct rockchip_otp_data *data =
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(void *)dev_get_driver_data(dev);
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if (offset < 0 || !buf || size <= 0 || offset + size > data->size)
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return -EINVAL;
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if (!data->read)
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return -ENOSYS;
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return data->read(dev, offset, buf, size);
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}
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static const struct misc_ops rockchip_otp_ops = {
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@ -147,21 +145,26 @@ static const struct misc_ops rockchip_otp_ops = {
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static int rockchip_otp_of_to_plat(struct udevice *dev)
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{
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struct rockchip_otp_plat *otp = dev_get_plat(dev);
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struct rockchip_otp_plat *plat = dev_get_plat(dev);
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otp->base = dev_read_addr_ptr(dev);
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plat->base = dev_read_addr_ptr(dev);
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return 0;
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}
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static const struct rockchip_otp_data px30_data = {
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.read = rockchip_px30_otp_read,
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.size = 0x40,
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};
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static const struct udevice_id rockchip_otp_ids[] = {
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{
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.compatible = "rockchip,px30-otp",
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.data = (ulong)&rockchip_px30_otp_read,
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.data = (ulong)&px30_data,
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},
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{
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.compatible = "rockchip,rk3308-otp",
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.data = (ulong)&rockchip_px30_otp_read,
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.data = (ulong)&px30_data,
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},
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{}
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};
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@ -170,7 +173,7 @@ U_BOOT_DRIVER(rockchip_otp) = {
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.name = "rockchip_otp",
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.id = UCLASS_MISC,
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.of_match = rockchip_otp_ids,
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.ops = &rockchip_otp_ops,
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.of_to_plat = rockchip_otp_of_to_plat,
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.plat_auto = sizeof(struct rockchip_otp_plat),
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.plat_auto = sizeof(struct rockchip_otp_plat),
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.ops = &rockchip_otp_ops,
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};
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