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arm64: zynqmp: Switch all platforms to DM_I2C

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CONFIG_PCA953X is not needed because of PCA953X is integrated in gpio
subsystem already. That's why also remove CMD_PCA953X which is only for
this driver.

zcu102/zcu104-revC/zcu106/zcu111 contain links to eeprom which stores MAC address.

DM_I2C is not enabled for the whole SoC because it increase size for
mini configurations and there is no I2C symbol present to setup
dependencies.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Michal Simek 2019-01-18 09:10:39 +01:00
parent e0bc7574fa
commit 8bdad43333
20 changed files with 63 additions and 165 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
arch/arm/dts/zynqmp-zcu102-revA.dts
View file

@ -36,6 +36,7 @@
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
xlnx,eeprom = &eeprom;
};
memory@0 {

1
arch/arm/dts/zynqmp-zcu104-revC.dts
View file

@ -34,6 +34,7 @@
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
xlnx,eeprom = &eeprom;
};
memory@0 {

1
arch/arm/dts/zynqmp-zcu106-revA.dts
View file

@ -36,6 +36,7 @@
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
xlnx,eeprom = &eeprom;
};
memory@0 {

1
arch/arm/dts/zynqmp-zcu111-revA.dts
View file

@ -35,6 +35,7 @@
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
xlnx,eeprom = &eeprom;
};
memory@0 {

6
configs/avnet_ultra96_rev1_defconfig
View file

@ -49,8 +49,10 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_XILINX_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C1=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y

6
configs/xilinx_zynqmp_zcu100_revC_defconfig
View file

@ -49,8 +49,10 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_XILINX_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C1=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y

12
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
View file

@ -23,7 +23,6 @@ CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_CLK=y
@ -60,15 +59,18 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_XILINX_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_SDHCI=y

13
configs/xilinx_zynqmp_zcu102_revA_defconfig
View file

@ -23,7 +23,6 @@ CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_CLK=y
@ -60,15 +59,19 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_XILINX_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y

13
configs/xilinx_zynqmp_zcu102_revB_defconfig
View file

@ -23,7 +23,6 @@ CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_CLK=y
@ -60,15 +59,19 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_XILINX_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y

11
configs/xilinx_zynqmp_zcu104_revA_defconfig
View file

@ -19,7 +19,6 @@ CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
@ -50,10 +49,14 @@ CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C1=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y

11
configs/xilinx_zynqmp_zcu104_revC_defconfig
View file

@ -19,7 +19,6 @@ CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
@ -50,11 +49,15 @@ CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C1=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y

12
configs/xilinx_zynqmp_zcu106_revA_defconfig
View file

@ -22,7 +22,6 @@ CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
@ -57,14 +56,17 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y

12
configs/xilinx_zynqmp_zcu111_revA_defconfig
View file

@ -19,7 +19,6 @@ CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_ATF=y
CONFIG_SYS_PROMPT="ZynqMP> "
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
@ -49,14 +48,17 @@ CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_SYS_I2C_EEPROM_ADDR=0x0
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y

5
include/configs/xilinx_zynqmp.h
View file

@ -108,11 +108,6 @@
# define PHY_ANEG_TIMEOUT 20000
#endif
/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_SYS_I2C
#endif
/* EEPROM */
#ifdef CONFIG_ZYNQMP_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2

15
include/configs/xilinx_zynqmp_zcu100.h
View file

@ -9,21 +9,6 @@
#ifndef __CONFIG_ZYNQMP_ZCU100_H
#define __CONFIG_ZYNQMP_ZCU100_H
/* FIXME Will go away soon */
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 9
#define CONFIG_SYS_I2C_BUSES { \
{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
{0, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
}
#include <configs/xilinx_zynqmp.h>
#endif /* __CONFIG_ZYNQMP_ZCU100_H */

29
include/configs/xilinx_zynqmp_zcu102.h
View file

@ -10,35 +10,6 @@
#define __CONFIG_ZYNQMP_ZCU102_H
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 18
#define CONFIG_SYS_I2C_BUSES { \
{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
{1, {I2C_NULL_HOP} }, \
{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
}
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
#define CONFIG_SPD_EEPROM
#define CONFIG_DDR_SPD

17
include/configs/xilinx_zynqmp_zcu104.h
View file

@ -10,23 +10,6 @@
#define __CONFIG_ZYNQMP_ZCU104_H
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 9
#define CONFIG_SYS_I2C_BUSES { \
{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 5} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 6} } }, \
{0, {{I2C_MUX_PCA9548, 0x74, 7} } }, \
}
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#include <configs/xilinx_zynqmp.h>

3
include/configs/xilinx_zynqmp_zcu104_revC.h
View file

@ -11,7 +11,4 @@
#include <configs/xilinx_zynqmp_zcu104.h>
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
#define CONFIG_ZYNQ_EEPROM_BUS 1
#endif /* __CONFIG_ZYNQMP_ZCU104_REVC_H */

28
include/configs/xilinx_zynqmp_zcu106.h
View file

@ -10,34 +10,6 @@
#define __CONFIG_ZYNQMP_ZCU106_H
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 18
#define CONFIG_SYS_I2C_BUSES { \
{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
{1, {I2C_NULL_HOP} }, \
{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
}
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
#include <configs/xilinx_zynqmp.h>

31
include/configs/xilinx_zynqmp_zcu111.h
View file

@ -10,37 +10,6 @@
#define __CONFIG_ZYNQMP_ZCU111_H
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 21
#define CONFIG_SYS_I2C_BUSES { \
{0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
{0, {{I2C_MUX_PCA9544, 0x75, 3} } }, \
{1, {I2C_NULL_HOP} }, \
{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 5} } }, \
{1, {{I2C_MUX_PCA9548, 0x74, 6} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
}
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
#include <configs/xilinx_zynqmp.h>