net: designware: Add support to PCI designware devices
The Designware ethernet controller is also seen on PCI bus, e.g. on Intel Quark SoC. Add this support in the DM version driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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1 changed files with 42 additions and 0 deletions
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@ -14,6 +14,7 @@
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#include <errno.h>
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#include <miiphy.h>
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#include <malloc.h>
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#include <pci.h>
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#include <linux/compiler.h>
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#include <linux/err.h>
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#include <asm/io.h>
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@ -558,6 +559,22 @@ static int designware_eth_write_hwaddr(struct udevice *dev)
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return _dw_write_hwaddr(priv, pdata->enetaddr);
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}
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static int designware_eth_bind(struct udevice *dev)
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{
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#ifdef CONFIG_DM_PCI
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static int num_cards;
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char name[20];
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/* Create a unique device name for PCI type devices */
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if (device_is_on_pci_bus(dev)) {
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sprintf(name, "eth_designware#%u", num_cards++);
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device_set_name(dev, name);
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}
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#endif
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return 0;
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}
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static int designware_eth_probe(struct udevice *dev)
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{
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struct eth_pdata *pdata = dev_get_platdata(dev);
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@ -565,6 +582,23 @@ static int designware_eth_probe(struct udevice *dev)
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u32 iobase = pdata->iobase;
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int ret;
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#ifdef CONFIG_DM_PCI
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/*
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* If we are on PCI bus, either directly attached to a PCI root port,
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* or via a PCI bridge, fill in platdata before we probe the hardware.
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*/
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if (device_is_on_pci_bus(dev)) {
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pci_dev_t bdf = pci_get_bdf(dev);
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dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase);
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iobase &= PCI_BASE_ADDRESS_MEM_MASK;
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iobase = pci_mem_to_phys(bdf, iobase);
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pdata->iobase = iobase;
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pdata->phy_interface = PHY_INTERFACE_MODE_RMII;
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}
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#endif
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debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
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priv->mac_regs_p = (struct eth_mac_regs *)iobase;
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priv->dma_regs_p = (struct eth_dma_regs *)(iobase + DW_DMA_BASE_OFFSET);
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@ -617,10 +651,18 @@ U_BOOT_DRIVER(eth_designware) = {
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.id = UCLASS_ETH,
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.of_match = designware_eth_ids,
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.ofdata_to_platdata = designware_eth_ofdata_to_platdata,
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.bind = designware_eth_bind,
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.probe = designware_eth_probe,
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.ops = &designware_eth_ops,
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.priv_auto_alloc_size = sizeof(struct dw_eth_dev),
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.platdata_auto_alloc_size = sizeof(struct eth_pdata),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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static struct pci_device_id supported[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_EMAC) },
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{ }
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};
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U_BOOT_PCI_DEVICE(eth_designware, supported);
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#endif
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