i2c, ppc4xx_i2c: switch to new multibus/multiadapter support
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Dirk Eibach
Heiko Schocher
parent
1f2ba722ac
commit
880540decf
98 changed files with 466 additions and 1026 deletions
5
README
5
README
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@ -1985,6 +1985,11 @@ CBFS (Coreboot Filesystem) support
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- This driver adds 4 i2c buses with a fix speed from
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100000 and the slave addr 0!
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- drivers/i2c/ppc4xx_i2c.c
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- activate this driver with CONFIG_SYS_I2C_PPC4XX
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- CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
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- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
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additional defines:
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CONFIG_SYS_NUM_I2C_BUSES
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@ -52,10 +52,6 @@
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/*
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* Set default values
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*/
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#ifndef CONFIG_SYS_I2C_SPEED
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#define CONFIG_SYS_I2C_SPEED 50000
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#endif
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#define ONE_BILLION 1000000000
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#define SDRAM0_CFG_DCE 0x80000000
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@ -158,7 +154,7 @@ long int spd_sdram(int(read_spd)(uint addr))
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* Make sure I2C controller is initialized
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* before continuing.
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*/
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
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}
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/* Make shure we are using SDRAM */
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@ -62,10 +62,6 @@
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/*
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* Set default values
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*/
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#ifndef CONFIG_SYS_I2C_SPEED
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#define CONFIG_SYS_I2C_SPEED 50000
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#endif
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#define ONE_BILLION 1000000000
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/*
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@ -168,7 +164,7 @@ long int spd_sdram(void) {
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* Make sure I2C controller is initialized
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* before continuing.
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*/
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
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/*
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* Read the SPD information using I2C interface. Check to see if the
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@ -459,8 +459,7 @@ phys_size_t initdram(int board_type)
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*/
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/* switch to correct I2C bus */
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I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
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/*------------------------------------------------------------------
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* Clear out the serial presence detect buffers.
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@ -56,7 +56,7 @@ static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const arg
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* First switch to correct I2C bus. This is I2C bus 0
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* for all currently available 4xx derivats.
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*/
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I2C_SET_BUS(0);
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i2c_set_bus_num(0);
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#ifdef CONFIG_CMD_EEPROM
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ret = eeprom_read(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR,
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@ -1041,8 +1041,7 @@ phys_size_t initdram(int board_type)
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* before continuing.
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*/
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/* switch to correct I2C bus */
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I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
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/*------------------------------------------------------------------
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* Clear out the serial presence detect buffers.
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@ -34,24 +34,6 @@
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#define IIC_TIMEOUT 1 /* 1 second */
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#if defined(CONFIG_I2C_MULTI_BUS)
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#define I2C_BUS_OFFS (i2c_bus_num * 0x100)
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#else
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#define I2C_BUS_OFFS (0x000)
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#endif /* CONFIG_I2C_MULTI_BUS */
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#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
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defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
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defined(CONFIG_460EX) || defined(CONFIG_460GT)
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#define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + I2C_BUS_OFFS)
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#elif defined(CONFIG_440) || defined(CONFIG_405EX)
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/* all remaining 440 variants */
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#define I2C_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + I2C_BUS_OFFS)
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#else
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/* all 405 variants */
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#define I2C_BASE_ADDR (0xEF600500 + I2C_BUS_OFFS)
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#endif
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struct ppc4xx_i2c {
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u8 mdbuf;
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u8 res1;
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@ -51,7 +51,7 @@ uchar pll_fs6377_regs[16] = {
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*/
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int pll_init(void)
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{
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(0);
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return i2c_write(CONFIG_SYS_I2C_PLL_ADDR, 0, 1,
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(uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs));
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@ -385,7 +385,6 @@ int last_stage_init(void)
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return 0;
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}
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#if defined(CONFIG_I2C_MULTI_BUS)
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/*
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* read field strength from I2C ADC
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*/
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@ -500,7 +499,6 @@ U_BOOT_CMD(
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"Initialize USB hub",
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""
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);
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#endif /* CONFIG_I2C_MULTI_BUS */
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#define CONFIG_SYS_BOOT_EEPROM_PAGE_WRITE_BITS 3
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int boot_eeprom_write (unsigned dev_addr,
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@ -111,7 +111,7 @@ static void kbd_init (void)
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uchar val, errcd;
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int i;
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i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(0);
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gd->arch.kbd_status = 0;
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@ -209,7 +209,7 @@ int board_early_init_f (void)
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#endif
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/* Read Serial Presence Detect Information */
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i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(0);
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for (i = 0; i < 128; i++)
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datain[i] = 127;
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i2c_read(SPD_EEPROM_ADDRESS,0,1,datain,128);
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@ -1,510 +0,0 @@
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/*
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* Copyright (C) 2005 Sandburst Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Ported from arch/powerpc/cpu/ppc4xx/i2c.c by AS HARNOIS by
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* Travis B. Sawyer
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* Sandburst Corporation.
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*/
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#include <common.h>
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#include <asm/ppc4xx.h>
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#include <asm/ppc4xx-i2c.h>
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#include <i2c.h>
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#include <command.h>
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#include "ppc440gx_i2c.h"
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#include <asm/io.h>
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#ifdef CONFIG_I2C_BUS1
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#define IIC_OK 0
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#define IIC_NOK 1
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#define IIC_NOK_LA 2 /* Lost arbitration */
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#define IIC_NOK_ICT 3 /* Incomplete transfer */
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#define IIC_NOK_XFRA 4 /* Transfer aborted */
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#define IIC_NOK_DATA 5 /* No data in buffer */
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#define IIC_NOK_TOUT 6 /* Transfer timeout */
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#define IIC_TIMEOUT 1 /* 1 second */
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#if defined(CONFIG_SYS_I2C_NOPROBES)
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static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
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#endif
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static struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_REGISTERS_BUS1_BASE_ADDRESS;
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static void _i2c_bus1_reset (void)
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{
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int i, status;
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/* Reset status register */
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/* write 1 in SCMP and IRQA to clear these fields */
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out_8 (IIC_STS1, 0x0A);
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/* write 1 in IRQP IRQD LA ICT XFRA to clear these fields */
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out_8 (IIC_EXTSTS1, 0x8F);
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__asm__ volatile ("eieio");
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/*
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* Get current state, reset bus
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* only if no transfers are pending.
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*/
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i = 10;
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do {
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/* Get status */
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status = in_8 (IIC_STS1);
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udelay (500); /* 500us */
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i--;
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} while ((status & IIC_STS_PT) && (i > 0));
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/* Soft reset controller */
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status = in_8 (IIC_XTCNTLSS1);
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out_8 (IIC_XTCNTLSS1, (status | IIC_XTCNTLSS_SRST));
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__asm__ volatile ("eieio");
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/* make sure where in initial state, data hi, clock hi */
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out_8 (IIC_DIRECTCNTL1, 0xC);
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for (i = 0; i < 10; i++) {
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if ((in_8 (IIC_DIRECTCNTL1) & 0x3) != 0x3) {
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/* clock until we get to known state */
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out_8 (IIC_DIRECTCNTL1, 0x8); /* clock lo */
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udelay (100); /* 100us */
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out_8 (IIC_DIRECTCNTL1, 0xC); /* clock hi */
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udelay (100); /* 100us */
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} else {
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break;
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}
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}
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/* send start condition */
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out_8 (IIC_DIRECTCNTL1, 0x4);
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udelay (1000); /* 1ms */
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/* send stop condition */
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out_8 (IIC_DIRECTCNTL1, 0xC);
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udelay (1000); /* 1ms */
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/* Unreset controller */
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out_8 (IIC_XTCNTLSS1, (status & ~IIC_XTCNTLSS_SRST));
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udelay (1000); /* 1ms */
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}
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void i2c1_init (int speed, int slaveadd)
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{
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sys_info_t sysInfo;
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unsigned long freqOPB;
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int val, divisor;
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#ifdef CONFIG_SYS_I2C_INIT_BOARD
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/* call board specific i2c bus reset routine before accessing the */
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/* environment, which might be in a chip on that bus. For details */
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/* about this problem see doc/I2C_Edge_Conditions. */
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i2c_init_board();
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#endif
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/* Handle possible failed I2C state */
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/* FIXME: put this into i2c_init_board()? */
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_i2c_bus1_reset ();
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/* clear lo master address */
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out_8 (IIC_LMADR1, 0);
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/* clear hi master address */
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out_8 (IIC_HMADR1, 0);
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/* clear lo slave address */
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out_8 (IIC_LSADR1, 0);
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/* clear hi slave address */
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out_8 (IIC_HSADR1, 0);
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/* Clock divide Register */
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/* get OPB frequency */
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get_sys_info (&sysInfo);
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freqOPB = sysInfo.freqPLB / sysInfo.pllOpbDiv;
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/* set divisor according to freqOPB */
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divisor = (freqOPB - 1) / 10000000;
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if (divisor == 0)
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divisor = 1;
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out_8 (IIC_CLKDIV1, divisor);
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/* no interrupts */
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out_8 (IIC_INTRMSK1, 0);
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/* clear transfer count */
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out_8 (IIC_XFRCNT1, 0);
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/* clear extended control & stat */
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/* write 1 in SRC SRS SWC SWS to clear these fields */
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out_8 (IIC_XTCNTLSS1, 0xF0);
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/* Mode Control Register
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Flush Slave/Master data buffer */
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out_8 (IIC_MDCNTL1, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
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__asm__ volatile ("eieio");
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val = in_8(IIC_MDCNTL1);
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__asm__ volatile ("eieio");
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/* Ignore General Call, slave transfers are ignored,
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disable interrupts, exit unknown bus state, enable hold
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SCL
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100kHz normaly or FastMode for 400kHz and above
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*/
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val |= IIC_MDCNTL_EUBS|IIC_MDCNTL_HSCL;
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if( speed >= 400000 ){
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val |= IIC_MDCNTL_FSM;
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}
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out_8 (IIC_MDCNTL1, val);
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/* clear control reg */
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out_8 (IIC_CNTL1, 0x00);
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__asm__ volatile ("eieio");
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}
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/*
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This code tries to use the features of the 405GP i2c
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controller. It will transfer up to 4 bytes in one pass
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on the loop. It only does out_8(lbz) to the buffer when it
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is possible to do out16(lhz) transfers.
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cmd_type is 0 for write 1 for read.
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addr_len can take any value from 0-255, it is only limited
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by the char, we could make it larger if needed. If it is
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0 we skip the address write cycle.
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Typical case is a Write of an addr followd by a Read. The
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IBM FAQ does not cover this. On the last byte of the write
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we don't set the creg CHT bit, and on the first bytes of the
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read we set the RPST bit.
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It does not support address only transfers, there must be
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a data part. If you want to write the address yourself, put
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it in the data pointer.
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It does not support transfer to/from address 0.
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It does not check XFRCNT.
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*/
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static
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int i2c_transfer1(unsigned char cmd_type,
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unsigned char chip,
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unsigned char addr[],
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unsigned char addr_len,
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unsigned char data[],
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unsigned short data_len )
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{
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unsigned char* ptr;
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int reading;
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int tran,cnt;
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int result;
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int status;
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int i;
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uchar creg;
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if( data == 0 || data_len == 0 ){
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/*Don't support data transfer of no length or to address 0*/
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printf( "i2c_transfer: bad call\n" );
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return IIC_NOK;
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}
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if( addr && addr_len ){
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ptr = addr;
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cnt = addr_len;
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reading = 0;
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}else{
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ptr = data;
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cnt = data_len;
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reading = cmd_type;
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}
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/*Clear Stop Complete Bit*/
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out_8(IIC_STS1,IIC_STS_SCMP);
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/* Check init */
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i=10;
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do {
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/* Get status */
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status = in_8(IIC_STS1);
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__asm__ volatile("eieio");
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i--;
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} while ((status & IIC_STS_PT) && (i>0));
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if (status & IIC_STS_PT) {
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result = IIC_NOK_TOUT;
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return(result);
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}
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/*flush the Master/Slave Databuffers*/
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out_8(IIC_MDCNTL1, ((in_8(IIC_MDCNTL1))|IIC_MDCNTL_FMDB|IIC_MDCNTL_FSDB));
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/*need to wait 4 OPB clocks? code below should take that long*/
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/* 7-bit adressing */
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out_8(IIC_HMADR1,0);
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out_8(IIC_LMADR1, chip);
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__asm__ volatile("eieio");
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tran = 0;
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result = IIC_OK;
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creg = 0;
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while ( tran != cnt && (result == IIC_OK)) {
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int bc,j;
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/* Control register =
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Normal transfer, 7-bits adressing, Transfer up to bc bytes, Normal start,
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Transfer is a sequence of transfers
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*/
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creg |= IIC_CNTL_PT;
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bc = (cnt - tran) > 4 ? 4 :
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cnt - tran;
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creg |= (bc-1)<<4;
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/* if the real cmd type is write continue trans*/
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if ( (!cmd_type && (ptr == addr)) || ((tran+bc) != cnt) )
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creg |= IIC_CNTL_CHT;
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if (reading)
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creg |= IIC_CNTL_READ;
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else {
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for(j=0; j<bc; j++) {
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/* Set buffer */
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out_8(IIC_MDBUF1,ptr[tran+j]);
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__asm__ volatile("eieio");
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}
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}
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out_8(IIC_CNTL1, creg );
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__asm__ volatile("eieio");
|
||||
|
||||
/* Transfer is in progress
|
||||
we have to wait for upto 5 bytes of data
|
||||
1 byte chip address+r/w bit then bc bytes
|
||||
of data.
|
||||
udelay(10) is 1 bit time at 100khz
|
||||
Doubled for slop. 20 is too small.
|
||||
*/
|
||||
i=2*5*8;
|
||||
do {
|
||||
/* Get status */
|
||||
status = in_8(IIC_STS1);
|
||||
__asm__ volatile("eieio");
|
||||
udelay (10);
|
||||
i--;
|
||||
} while ((status & IIC_STS_PT) && !(status & IIC_STS_ERR)
|
||||
&& (i>0));
|
||||
|
||||
if (status & IIC_STS_ERR) {
|
||||
result = IIC_NOK;
|
||||
status = in_8 (IIC_EXTSTS1);
|
||||
/* Lost arbitration? */
|
||||
if (status & IIC_EXTSTS_LA)
|
||||
result = IIC_NOK_LA;
|
||||
/* Incomplete transfer? */
|
||||
if (status & IIC_EXTSTS_ICT)
|
||||
result = IIC_NOK_ICT;
|
||||
/* Transfer aborted? */
|
||||
if (status & IIC_EXTSTS_XFRA)
|
||||
result = IIC_NOK_XFRA;
|
||||
} else if ( status & IIC_STS_PT) {
|
||||
result = IIC_NOK_TOUT;
|
||||
}
|
||||
/* Command is reading => get buffer */
|
||||
if ((reading) && (result == IIC_OK)) {
|
||||
/* Are there data in buffer */
|
||||
if (status & IIC_STS_MDBS) {
|
||||
/*
|
||||
even if we have data we have to wait 4OPB clocks
|
||||
for it to hit the front of the FIFO, after that
|
||||
we can just read. We should check XFCNT here and
|
||||
if the FIFO is full there is no need to wait.
|
||||
*/
|
||||
udelay (1);
|
||||
for(j=0;j<bc;j++) {
|
||||
ptr[tran+j] = in_8(IIC_MDBUF1);
|
||||
__asm__ volatile("eieio");
|
||||
}
|
||||
} else
|
||||
result = IIC_NOK_DATA;
|
||||
}
|
||||
creg = 0;
|
||||
tran+=bc;
|
||||
if( ptr == addr && tran == cnt ) {
|
||||
ptr = data;
|
||||
cnt = data_len;
|
||||
tran = 0;
|
||||
reading = cmd_type;
|
||||
if( reading )
|
||||
creg = IIC_CNTL_RPST;
|
||||
}
|
||||
}
|
||||
return (result);
|
||||
}
|
||||
|
||||
int i2c_probe1 (uchar chip)
|
||||
{
|
||||
uchar buf[1];
|
||||
|
||||
buf[0] = 0;
|
||||
|
||||
/*
|
||||
* What is needed is to send the chip address and verify that the
|
||||
* address was <ACK>ed (i.e. there was a chip at that address which
|
||||
* drove the data line low).
|
||||
*/
|
||||
return(i2c_transfer1 (1, chip << 1, 0,0, buf, 1) != 0);
|
||||
}
|
||||
|
||||
|
||||
int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
|
||||
{
|
||||
uchar xaddr[4];
|
||||
int ret;
|
||||
|
||||
if ( alen > 4 ) {
|
||||
printf ("I2C read: addr len %d not supported\n", alen);
|
||||
return 1;
|
||||
}
|
||||
|
||||
if ( alen > 0 ) {
|
||||
xaddr[0] = (addr >> 24) & 0xFF;
|
||||
xaddr[1] = (addr >> 16) & 0xFF;
|
||||
xaddr[2] = (addr >> 8) & 0xFF;
|
||||
xaddr[3] = addr & 0xFF;
|
||||
}
|
||||
|
||||
|
||||
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
|
||||
/*
|
||||
* EEPROM chips that implement "address overflow" are ones
|
||||
* like Catalyst 24WC04/08/16 which has 9/10/11 bits of
|
||||
* address and the extra bits end up in the "chip address"
|
||||
* bit slots. This makes a 24WC08 (1Kbyte) chip look like
|
||||
* four 256 byte chips.
|
||||
*
|
||||
* Note that we consider the length of the address field to
|
||||
* still be one byte because the extra address bits are
|
||||
* hidden in the chip address.
|
||||
*/
|
||||
if( alen > 0 )
|
||||
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
||||
#endif
|
||||
if( (ret = i2c_transfer1( 1, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) {
|
||||
printf( "I2c read: failed %d\n", ret);
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len)
|
||||
{
|
||||
uchar xaddr[4];
|
||||
|
||||
if ( alen > 4 ) {
|
||||
printf ("I2C write: addr len %d not supported\n", alen);
|
||||
return 1;
|
||||
|
||||
}
|
||||
if ( alen > 0 ) {
|
||||
xaddr[0] = (addr >> 24) & 0xFF;
|
||||
xaddr[1] = (addr >> 16) & 0xFF;
|
||||
xaddr[2] = (addr >> 8) & 0xFF;
|
||||
xaddr[3] = addr & 0xFF;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
|
||||
/*
|
||||
* EEPROM chips that implement "address overflow" are ones
|
||||
* like Catalyst 24WC04/08/16 which has 9/10/11 bits of
|
||||
* address and the extra bits end up in the "chip address"
|
||||
* bit slots. This makes a 24WC08 (1Kbyte) chip look like
|
||||
* four 256 byte chips.
|
||||
*
|
||||
* Note that we consider the length of the address field to
|
||||
* still be one byte because the extra address bits are
|
||||
* hidden in the chip address.
|
||||
*/
|
||||
if( alen > 0 )
|
||||
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
||||
#endif
|
||||
|
||||
return (i2c_transfer1( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Read a register
|
||||
*/
|
||||
uchar i2c_reg_read1(uchar i2c_addr, uchar reg)
|
||||
{
|
||||
uchar buf;
|
||||
|
||||
i2c_read1(i2c_addr, reg, 1, &buf, (uchar)1);
|
||||
|
||||
return(buf);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a register
|
||||
*/
|
||||
void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val)
|
||||
{
|
||||
i2c_write1(i2c_addr, reg, 1, &val, 1);
|
||||
}
|
||||
|
||||
|
||||
int do_i2c1_probe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
|
||||
{
|
||||
int j;
|
||||
#if defined(CONFIG_SYS_I2C_NOPROBES)
|
||||
int k, skip;
|
||||
#endif
|
||||
|
||||
puts ("Valid chip addresses:");
|
||||
for(j = 0; j < 128; j++) {
|
||||
#if defined(CONFIG_SYS_I2C_NOPROBES)
|
||||
skip = 0;
|
||||
for (k = 0; k < sizeof(i2c_no_probes); k++){
|
||||
if (j == i2c_no_probes[k]){
|
||||
skip = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (skip)
|
||||
continue;
|
||||
#endif
|
||||
if(i2c_probe1(j) == 0) {
|
||||
printf(" %02X", j);
|
||||
}
|
||||
}
|
||||
putc ('\n');
|
||||
|
||||
#if defined(CONFIG_SYS_I2C_NOPROBES)
|
||||
puts ("Excluded chip addresses:");
|
||||
for( k = 0; k < sizeof(i2c_no_probes); k++ )
|
||||
printf(" %02X", i2c_no_probes[k] );
|
||||
putc ('\n');
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_CMD(
|
||||
iprobe1, 1, 1, do_i2c1_probe,
|
||||
"probe to discover valid I2C chip addresses",
|
||||
""
|
||||
);
|
||||
|
||||
#endif /* CONFIG_I2C_BUS1 */
|
||||
|
|
@ -1,60 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2005 Sandburst Corporation
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* Ported from i2c driver for ppc4xx by AS HARNOIS by
|
||||
* Travis B. Sawyer
|
||||
* Sandburst Corporation
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <asm/ppc4xx.h>
|
||||
#include <asm/ppc4xx-i2c.h>
|
||||
#include <i2c.h>
|
||||
|
||||
#ifdef CONFIG_HARD_I2C
|
||||
|
||||
#define I2C_BUS1_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
|
||||
#define I2C_REGISTERS_BUS1_BASE_ADDRESS I2C_BUS1_BASE_ADDR
|
||||
#define IIC_MDBUF1 (&i2c->mdbuf)
|
||||
#define IIC_SDBUF1 (&i2c->sdbuf)
|
||||
#define IIC_LMADR1 (&i2c->lmadr)
|
||||
#define IIC_HMADR1 (&i2c->hmadr)
|
||||
#define IIC_CNTL1 (&i2c->cntl)
|
||||
#define IIC_MDCNTL1 (&i2c->mdcntl)
|
||||
#define IIC_STS1 (&i2c->sts)
|
||||
#define IIC_EXTSTS1 (&i2c->extsts)
|
||||
#define IIC_LSADR1 (&i2c->lsadr)
|
||||
#define IIC_HSADR1 (&i2c->hsadr)
|
||||
#define IIC_CLKDIV1 (&i2c->clkdiv)
|
||||
#define IIC_INTRMSK1 (&i2c->intrmsk)
|
||||
#define IIC_XFRCNT1 (&i2c->xfrcnt)
|
||||
#define IIC_XTCNTLSS1 (&i2c->xtcntlss)
|
||||
#define IIC_DIRECTCNTL1 (&i2c->directcntl)
|
||||
|
||||
void i2c1_init (int speed, int slaveadd);
|
||||
int i2c_probe1 (uchar chip);
|
||||
int i2c_read1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
|
||||
int i2c_write1 (uchar chip, uint addr, int alen, uchar * buffer, int len);
|
||||
uchar i2c_reg_read1(uchar i2c_addr, uchar reg);
|
||||
void i2c_reg_write1(uchar i2c_addr, uchar reg, uchar val);
|
||||
|
||||
#endif /* CONFIG_HARD_I2C */
|
||||
|
|
@ -26,7 +26,6 @@
|
|||
#include <asm/io.h>
|
||||
#include <spd_sdram.h>
|
||||
#include <i2c.h>
|
||||
#include "ppc440gx_i2c.h"
|
||||
#include "sb_common.h"
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
|
@ -84,7 +83,7 @@ unsigned short sbcommon_get_serial_number(void)
|
|||
|
||||
/* Get the board serial number from eeprom */
|
||||
/* Initialize I2C */
|
||||
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
i2c_set_bus_num(0);
|
||||
|
||||
/* Read 256 bytes in EEPROM */
|
||||
i2c_read (0x50, 0, 1, buff, 0x100);
|
||||
|
|
@ -110,85 +109,87 @@ void sbcommon_fans(void)
|
|||
* Attempt to turn on 2 of the fans...
|
||||
* Need to go through the bridge
|
||||
*/
|
||||
i2c_set_bus_num(1);
|
||||
puts ("FANS: ");
|
||||
|
||||
/* select fan4 through the bridge */
|
||||
i2c_reg_write1(0x73, /* addr */
|
||||
0x00, /* reg */
|
||||
0x08); /* val = bus 4 */
|
||||
i2c_reg_write(0x73, /* addr */
|
||||
0x00, /* reg */
|
||||
0x08); /* val = bus 4 */
|
||||
|
||||
/* Turn on FAN 4 */
|
||||
i2c_reg_write1(0x2e,
|
||||
1,
|
||||
0x80);
|
||||
i2c_reg_write(0x2e,
|
||||
1,
|
||||
0x80);
|
||||
|
||||
i2c_reg_write1(0x2e,
|
||||
0,
|
||||
0x19);
|
||||
i2c_reg_write(0x2e,
|
||||
0,
|
||||
0x19);
|
||||
|
||||
/* Deselect bus 4 on the bridge */
|
||||
i2c_reg_write1(0x73,
|
||||
0x00,
|
||||
0x00);
|
||||
i2c_reg_write(0x73,
|
||||
0x00,
|
||||
0x00);
|
||||
|
||||
/* select fan3 through the bridge */
|
||||
i2c_reg_write1(0x73, /* addr */
|
||||
0x00, /* reg */
|
||||
0x04); /* val = bus 3 */
|
||||
i2c_reg_write(0x73, /* addr */
|
||||
0x00, /* reg */
|
||||
0x04); /* val = bus 3 */
|
||||
|
||||
/* Turn on FAN 3 */
|
||||
i2c_reg_write1(0x2e,
|
||||
1,
|
||||
0x80);
|
||||
i2c_reg_write(0x2e,
|
||||
1,
|
||||
0x80);
|
||||
|
||||
i2c_reg_write1(0x2e,
|
||||
0,
|
||||
0x19);
|
||||
i2c_reg_write(0x2e,
|
||||
0,
|
||||
0x19);
|
||||
|
||||
/* Deselect bus 3 on the bridge */
|
||||
i2c_reg_write1(0x73,
|
||||
0x00,
|
||||
0x00);
|
||||
i2c_reg_write(0x73,
|
||||
0x00,
|
||||
0x00);
|
||||
|
||||
/* select fan2 through the bridge */
|
||||
i2c_reg_write1(0x73, /* addr */
|
||||
0x00, /* reg */
|
||||
0x02); /* val = bus 4 */
|
||||
i2c_reg_write(0x73, /* addr */
|
||||
0x00, /* reg */
|
||||
0x02); /* val = bus 4 */
|
||||
|
||||
/* Turn on FAN 2 */
|
||||
i2c_reg_write1(0x2e,
|
||||
1,
|
||||
0x80);
|
||||
i2c_reg_write(0x2e,
|
||||
1,
|
||||
0x80);
|
||||
|
||||
i2c_reg_write1(0x2e,
|
||||
0,
|
||||
0x19);
|
||||
i2c_reg_write(0x2e,
|
||||
0,
|
||||
0x19);
|
||||
|
||||
/* Deselect bus 2 on the bridge */
|
||||
i2c_reg_write1(0x73,
|
||||
0x00,
|
||||
0x00);
|
||||
i2c_reg_write(0x73,
|
||||
0x00,
|
||||
0x00);
|
||||
|
||||
/* select fan1 through the bridge */
|
||||
i2c_reg_write1(0x73, /* addr */
|
||||
0x00, /* reg */
|
||||
0x01); /* val = bus 0 */
|
||||
i2c_reg_write(0x73, /* addr */
|
||||
0x00, /* reg */
|
||||
0x01); /* val = bus 0 */
|
||||
|
||||
/* Turn on FAN 1 */
|
||||
i2c_reg_write1(0x2e,
|
||||
1,
|
||||
0x80);
|
||||
i2c_reg_write(0x2e,
|
||||
1,
|
||||
0x80);
|
||||
|
||||
i2c_reg_write1(0x2e,
|
||||
0,
|
||||
0x19);
|
||||
i2c_reg_write(0x2e,
|
||||
0,
|
||||
0x19);
|
||||
|
||||
/* Deselect bus 1 on the bridge */
|
||||
i2c_reg_write1(0x73,
|
||||
0x00,
|
||||
0x00);
|
||||
i2c_reg_write(0x73,
|
||||
0x00,
|
||||
0x00);
|
||||
|
||||
puts ("on\n");
|
||||
i2c_set_bus_num(0);
|
||||
|
||||
return;
|
||||
|
||||
|
|
@ -319,7 +320,7 @@ void board_get_enetaddr(int macaddr_idx, uchar *enet)
|
|||
if (0 == macaddr_idx) {
|
||||
|
||||
/* Initialize I2C */
|
||||
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
i2c_set_bus_num(0);
|
||||
|
||||
/* Read 256 bytes in EEPROM */
|
||||
i2c_read (0x50, 0, 1, buff, 0x100);
|
||||
|
|
|
|||
|
|
@ -28,7 +28,6 @@
|
|||
#include <asm/io.h>
|
||||
#include <spd_sdram.h>
|
||||
#include <i2c.h>
|
||||
#include "ppc440gx_i2c.h"
|
||||
|
||||
/*
|
||||
* GPIO Settings
|
||||
|
|
|
|||
|
|
@ -40,8 +40,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
|
|||
|
||||
LIB = $(obj)lib$(BOARD).o
|
||||
|
||||
COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \
|
||||
../common/sb_common.o
|
||||
COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o
|
||||
|
||||
SOBJS = init.o
|
||||
|
||||
|
|
|
|||
|
|
@ -337,11 +337,6 @@ int checkboard (void)
|
|||
************************************************************************/
|
||||
int misc_init_f (void)
|
||||
{
|
||||
/* Turn on i2c bus 1 */
|
||||
puts ("I2C1: ");
|
||||
i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
puts ("ready\n");
|
||||
|
||||
/* Turn on fans 3 & 4 */
|
||||
sbcommon_fans();
|
||||
|
||||
|
|
|
|||
|
|
@ -39,8 +39,7 @@ CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
|
|||
|
||||
LIB = $(obj)lib$(BOARD).o
|
||||
|
||||
COBJS = $(BOARD).o ../common/flash.o ../common/ppc440gx_i2c.o \
|
||||
../common/sb_common.o
|
||||
COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o
|
||||
SOBJS = init.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
|
|
|
|||
|
|
@ -30,7 +30,6 @@
|
|||
#include <asm/io.h>
|
||||
#include <spd_sdram.h>
|
||||
#include <i2c.h>
|
||||
#include "../common/ppc440gx_i2c.h"
|
||||
#include "../common/sb_common.h"
|
||||
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \
|
||||
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
|
||||
|
|
@ -305,11 +304,6 @@ int checkboard (void)
|
|||
************************************************************************/
|
||||
int misc_init_f (void)
|
||||
{
|
||||
/* Turn on i2c bus 1 */
|
||||
puts ("I2C1: ");
|
||||
i2c1_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
puts ("ready\n");
|
||||
|
||||
/* Turn on fans */
|
||||
sbcommon_fans();
|
||||
|
||||
|
|
|
|||
|
|
@ -36,7 +36,6 @@ COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
|
|||
COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
|
||||
COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
|
||||
COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
|
||||
COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o
|
||||
COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
|
||||
COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
|
||||
COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
|
||||
|
|
@ -45,6 +44,7 @@ COBJS-$(CONFIG_SH_I2C) += sh_i2c.o
|
|||
COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
|
||||
COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
|
||||
COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
|
||||
COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
|
||||
COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
|
||||
COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
|
||||
COBJS-$(CONFIG_ZYNQ_I2C) += zynq_i2c.o
|
||||
|
|
|
|||
|
|
@ -32,27 +32,29 @@
|
|||
#include <i2c.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#ifdef CONFIG_HARD_I2C
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#if defined(CONFIG_I2C_MULTI_BUS)
|
||||
/*
|
||||
* Initialize the bus pointer to whatever one the SPD EEPROM is on.
|
||||
* Default is bus 0. This is necessary because the DDR initialization
|
||||
* runs from ROM, and we can't switch buses because we can't modify
|
||||
* the global variables.
|
||||
*/
|
||||
#ifndef CONFIG_SYS_SPD_BUS_NUM
|
||||
#define CONFIG_SYS_SPD_BUS_NUM 0
|
||||
#endif
|
||||
static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
|
||||
CONFIG_SYS_SPD_BUS_NUM;
|
||||
#endif /* CONFIG_I2C_MULTI_BUS */
|
||||
|
||||
static void _i2c_bus_reset(void)
|
||||
static inline struct ppc4xx_i2c *ppc4xx_get_i2c(int hwadapnr)
|
||||
{
|
||||
struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
|
||||
unsigned long base;
|
||||
|
||||
#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
|
||||
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
|
||||
defined(CONFIG_460EX) || defined(CONFIG_460GT)
|
||||
base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000700 + (hwadapnr * 0x100);
|
||||
#elif defined(CONFIG_440) || defined(CONFIG_405EX)
|
||||
/* all remaining 440 variants */
|
||||
base = CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 + (hwadapnr * 0x100);
|
||||
#else
|
||||
/* all 405 variants */
|
||||
base = 0xEF600500 + (hwadapnr * 0x100);
|
||||
#endif
|
||||
return (struct ppc4xx_i2c *)base;
|
||||
}
|
||||
|
||||
static void _i2c_bus_reset(struct i2c_adapter *adap)
|
||||
{
|
||||
struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
|
||||
int i;
|
||||
u8 dc;
|
||||
|
||||
|
|
@ -91,11 +93,10 @@ static void _i2c_bus_reset(void)
|
|||
out_8(&i2c->xtcntlss, 0);
|
||||
}
|
||||
|
||||
void i2c_init(int speed, int slaveaddr)
|
||||
static void ppc4xx_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
|
||||
{
|
||||
struct ppc4xx_i2c *i2c;
|
||||
struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
|
||||
int val, divisor;
|
||||
int bus;
|
||||
|
||||
#ifdef CONFIG_SYS_I2C_INIT_BOARD
|
||||
/*
|
||||
|
|
@ -106,67 +107,57 @@ void i2c_init(int speed, int slaveaddr)
|
|||
i2c_init_board();
|
||||
#endif
|
||||
|
||||
for (bus = 0; bus < CONFIG_SYS_MAX_I2C_BUS; bus++) {
|
||||
I2C_SET_BUS(bus);
|
||||
/* Handle possible failed I2C state */
|
||||
/* FIXME: put this into i2c_init_board()? */
|
||||
_i2c_bus_reset(adap);
|
||||
|
||||
/* Set i2c pointer after calling I2C_SET_BUS() */
|
||||
i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
|
||||
/* clear lo master address */
|
||||
out_8(&i2c->lmadr, 0);
|
||||
|
||||
/* Handle possible failed I2C state */
|
||||
/* FIXME: put this into i2c_init_board()? */
|
||||
_i2c_bus_reset();
|
||||
/* clear hi master address */
|
||||
out_8(&i2c->hmadr, 0);
|
||||
|
||||
/* clear lo master address */
|
||||
out_8(&i2c->lmadr, 0);
|
||||
/* clear lo slave address */
|
||||
out_8(&i2c->lsadr, 0);
|
||||
|
||||
/* clear hi master address */
|
||||
out_8(&i2c->hmadr, 0);
|
||||
/* clear hi slave address */
|
||||
out_8(&i2c->hsadr, 0);
|
||||
|
||||
/* clear lo slave address */
|
||||
out_8(&i2c->lsadr, 0);
|
||||
/* Clock divide Register */
|
||||
/* set divisor according to freq_opb */
|
||||
divisor = (get_OPB_freq() - 1) / 10000000;
|
||||
if (divisor == 0)
|
||||
divisor = 1;
|
||||
out_8(&i2c->clkdiv, divisor);
|
||||
|
||||
/* clear hi slave address */
|
||||
out_8(&i2c->hsadr, 0);
|
||||
/* no interrupts */
|
||||
out_8(&i2c->intrmsk, 0);
|
||||
|
||||
/* Clock divide Register */
|
||||
/* set divisor according to freq_opb */
|
||||
divisor = (get_OPB_freq() - 1) / 10000000;
|
||||
if (divisor == 0)
|
||||
divisor = 1;
|
||||
out_8(&i2c->clkdiv, divisor);
|
||||
/* clear transfer count */
|
||||
out_8(&i2c->xfrcnt, 0);
|
||||
|
||||
/* no interrupts */
|
||||
out_8(&i2c->intrmsk, 0);
|
||||
/* clear extended control & stat */
|
||||
/* write 1 in SRC SRS SWC SWS to clear these fields */
|
||||
out_8(&i2c->xtcntlss, 0xF0);
|
||||
|
||||
/* clear transfer count */
|
||||
out_8(&i2c->xfrcnt, 0);
|
||||
/* Mode Control Register
|
||||
Flush Slave/Master data buffer */
|
||||
out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
|
||||
|
||||
/* clear extended control & stat */
|
||||
/* write 1 in SRC SRS SWC SWS to clear these fields */
|
||||
out_8(&i2c->xtcntlss, 0xF0);
|
||||
val = in_8(&i2c->mdcntl);
|
||||
|
||||
/* Mode Control Register
|
||||
Flush Slave/Master data buffer */
|
||||
out_8(&i2c->mdcntl, IIC_MDCNTL_FSDB | IIC_MDCNTL_FMDB);
|
||||
/* Ignore General Call, slave transfers are ignored,
|
||||
* disable interrupts, exit unknown bus state, enable hold
|
||||
* SCL 100kHz normaly or FastMode for 400kHz and above
|
||||
*/
|
||||
|
||||
val = in_8(&i2c->mdcntl);
|
||||
val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL;
|
||||
if (speed >= 400000)
|
||||
val |= IIC_MDCNTL_FSM;
|
||||
out_8(&i2c->mdcntl, val);
|
||||
|
||||
/* Ignore General Call, slave transfers are ignored,
|
||||
* disable interrupts, exit unknown bus state, enable hold
|
||||
* SCL 100kHz normaly or FastMode for 400kHz and above
|
||||
*/
|
||||
|
||||
val |= IIC_MDCNTL_EUBS | IIC_MDCNTL_HSCL;
|
||||
if (speed >= 400000)
|
||||
val |= IIC_MDCNTL_FSM;
|
||||
out_8(&i2c->mdcntl, val);
|
||||
|
||||
/* clear control reg */
|
||||
out_8(&i2c->cntl, 0x00);
|
||||
}
|
||||
|
||||
/* set to SPD bus as default bus upon powerup */
|
||||
I2C_SET_BUS(CONFIG_SYS_SPD_BUS_NUM);
|
||||
/* clear control reg */
|
||||
out_8(&i2c->cntl, 0x00);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -194,14 +185,15 @@ void i2c_init(int speed, int slaveaddr)
|
|||
*
|
||||
* It does not check XFRCNT.
|
||||
*/
|
||||
static int i2c_transfer(unsigned char cmd_type,
|
||||
static int _i2c_transfer(struct i2c_adapter *adap,
|
||||
unsigned char cmd_type,
|
||||
unsigned char chip,
|
||||
unsigned char addr[],
|
||||
unsigned char addr_len,
|
||||
unsigned char data[],
|
||||
unsigned short data_len)
|
||||
{
|
||||
struct ppc4xx_i2c *i2c = (struct ppc4xx_i2c *)I2C_BASE_ADDR;
|
||||
struct ppc4xx_i2c *i2c = ppc4xx_get_i2c(adap->hwadapnr);
|
||||
u8 *ptr;
|
||||
int reading;
|
||||
int tran, cnt;
|
||||
|
|
@ -345,7 +337,7 @@ static int i2c_transfer(unsigned char cmd_type,
|
|||
return result;
|
||||
}
|
||||
|
||||
int i2c_probe(uchar chip)
|
||||
static int ppc4xx_i2c_probe(struct i2c_adapter *adap, uchar chip)
|
||||
{
|
||||
uchar buf[1];
|
||||
|
||||
|
|
@ -356,11 +348,11 @@ int i2c_probe(uchar chip)
|
|||
* address was <ACK>ed (i.e. there was a chip at that address which
|
||||
* drove the data line low).
|
||||
*/
|
||||
return (i2c_transfer(1, chip << 1, 0, 0, buf, 1) != 0);
|
||||
return (_i2c_transfer(adap, 1, chip << 1, 0, 0, buf, 1) != 0);
|
||||
}
|
||||
|
||||
static int ppc4xx_i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
|
||||
int len, int read)
|
||||
static int ppc4xx_i2c_transfer(struct i2c_adapter *adap, uchar chip, uint addr,
|
||||
int alen, uchar *buffer, int len, int read)
|
||||
{
|
||||
uchar xaddr[4];
|
||||
int ret;
|
||||
|
|
@ -394,43 +386,50 @@ static int ppc4xx_i2c_transfer(uchar chip, uint addr, int alen, uchar *buffer,
|
|||
chip |= ((addr >> (alen * 8)) &
|
||||
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
|
||||
#endif
|
||||
if ((ret = i2c_transfer(read, chip << 1, &xaddr[4 - alen], alen,
|
||||
buffer, len)) != 0) {
|
||||
ret = _i2c_transfer(adap, read, chip << 1, &xaddr[4 - alen], alen,
|
||||
buffer, len);
|
||||
if (ret) {
|
||||
printf("I2C %s: failed %d\n", read ? "read" : "write", ret);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_read(uchar chip, uint addr, int alen, uchar * buffer, int len)
|
||||
static int ppc4xx_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
|
||||
int alen, uchar *buffer, int len)
|
||||
{
|
||||
return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 1);
|
||||
return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 1);
|
||||
}
|
||||
|
||||
int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len)
|
||||
static int ppc4xx_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
|
||||
int alen, uchar *buffer, int len)
|
||||
{
|
||||
return ppc4xx_i2c_transfer(chip, addr, alen, buffer, len, 0);
|
||||
return ppc4xx_i2c_transfer(adap, chip, addr, alen, buffer, len, 0);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_I2C_MULTI_BUS)
|
||||
/*
|
||||
* Functions for multiple I2C bus handling
|
||||
*/
|
||||
unsigned int i2c_get_bus_num(void)
|
||||
static unsigned int ppc4xx_i2c_set_bus_speed(struct i2c_adapter *adap,
|
||||
unsigned int speed)
|
||||
{
|
||||
return i2c_bus_num;
|
||||
}
|
||||
|
||||
int i2c_set_bus_num(unsigned int bus)
|
||||
{
|
||||
if (bus >= CONFIG_SYS_MAX_I2C_BUS)
|
||||
if (speed != adap->speed)
|
||||
return -1;
|
||||
|
||||
i2c_bus_num = bus;
|
||||
|
||||
return 0;
|
||||
return speed;
|
||||
}
|
||||
#endif /* CONFIG_I2C_MULTI_BUS */
|
||||
#endif /* CONFIG_HARD_I2C */
|
||||
|
||||
/*
|
||||
* Register ppc4xx i2c adapters
|
||||
*/
|
||||
#ifdef CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_0, ppc4xx_i2c_init, ppc4xx_i2c_probe,
|
||||
ppc4xx_i2c_read, ppc4xx_i2c_write,
|
||||
ppc4xx_i2c_set_bus_speed,
|
||||
CONFIG_SYS_I2C_PPC4XX_SPEED_0,
|
||||
CONFIG_SYS_I2C_PPC4XX_SLAVE_0, 0)
|
||||
#endif
|
||||
#ifdef CONFIG_SYS_I2C_PPC4XX_CH1
|
||||
U_BOOT_I2C_ADAP_COMPLETE(ppc4xx_1, ppc4xx_i2c_init, ppc4xx_i2c_probe,
|
||||
ppc4xx_i2c_read, ppc4xx_i2c_write,
|
||||
ppc4xx_i2c_set_bus_speed,
|
||||
CONFIG_SYS_I2C_PPC4XX_SPEED_1,
|
||||
CONFIG_SYS_I2C_PPC4XX_SLAVE_1, 1)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -306,10 +306,11 @@
|
|||
/*
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -247,10 +247,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -180,14 +180,14 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC08) for environment
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
|
||||
/* mask of address bits that overflow into the "EEPROM chip address" */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
|
||||
|
||||
|
|
|
|||
|
|
@ -402,10 +402,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -226,10 +226,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -211,10 +211,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -260,10 +260,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC08) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -287,10 +287,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -263,10 +263,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC32) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC32 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -282,10 +282,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -196,10 +196,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC08) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -76,11 +76,12 @@
|
|||
#define CONFIG_SERVERIP 10.0.0.1
|
||||
#define CONFIG_ETHADDR 00:40:a6:80:14:5
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* hardware support for i2c */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SDRAM_BANK0 1
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_IDENT_STRING "Cray L1"
|
||||
|
|
|
|||
|
|
@ -178,10 +178,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -197,10 +197,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC08) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -170,18 +170,20 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_I2C_MULTI_BUS 1
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH1
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
|
||||
|
||||
#define CONFIG_SYS_SPD_BUS_NUM 0
|
||||
#define IIC1_MCP3021_ADDR 0x4d
|
||||
#define IIC1_USB2507_ADDR 0x2c
|
||||
#ifdef CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_NOPROBES {{1, IIC1_USB2507_ADDR}}
|
||||
#endif
|
||||
#define CONFIG_SYS_I2C_NOPROBES { {1, IIC1_USB2507_ADDR} }
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
|
|
|
|||
|
|
@ -298,10 +298,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
|
||||
/* CAT24WC08/16... */
|
||||
|
|
|
|||
|
|
@ -334,14 +334,15 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#if 0 /* test-only */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#else
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#endif
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
|
||||
#define CONFIG_SYS_EEPROM_WREN 1
|
||||
|
|
|
|||
|
|
@ -246,10 +246,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -210,10 +210,11 @@
|
|||
|
||||
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
|
||||
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -133,13 +133,15 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */
|
||||
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH1
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Environment
|
||||
|
|
|
|||
|
|
@ -195,13 +195,15 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CONFIG_I2C_BUS1 1 /* Include i2c bus 1 supp */
|
||||
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH1
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000 /* I2C speed 400kHz */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES { { 0, 0x69} } /* Don't probe these addrs */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Environment
|
||||
|
|
|
|||
|
|
@ -98,10 +98,11 @@
|
|||
* The Atmel EEPROM uses 16Bit addressing.
|
||||
***************************************************************/
|
||||
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 /* EEPROM 24C128/256 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -217,10 +217,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC08) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -213,10 +213,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC08) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -209,10 +209,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -87,10 +87,11 @@
|
|||
* EEPROM of the SDRAM
|
||||
* The Atmel EEPROM uses 16Bit addressing.
|
||||
***************************************************************/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 50000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
|
|
|
|||
|
|
@ -281,10 +281,11 @@
|
|||
/*
|
||||
* I2C EEPROM (24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24WC16 */
|
||||
#define CONFIG_SYS_EEPROM_WREN 1
|
||||
|
|
|
|||
|
|
@ -239,10 +239,11 @@
|
|||
/*
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24W16 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -217,10 +217,11 @@
|
|||
/*
|
||||
* I2C EEPROM (24W16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24W16 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -225,12 +225,14 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
#define CONFIG_I2C_MULTI_BUS 1
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH1
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_1 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_1 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
|
||||
|
|
|
|||
|
|
@ -419,10 +419,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -280,10 +280,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
|
||||
#define CONFIG_SYS_EEPROM_WREN 1
|
||||
|
|
|
|||
|
|
@ -205,10 +205,11 @@
|
|||
/*
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -279,10 +279,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC08) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -286,10 +286,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (ATMEL 24C04N)
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* Hardware assisted I2C */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM ATMEL 24C04N */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -244,10 +244,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC16) for environment
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2c with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC08 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -206,7 +206,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -121,11 +121,12 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (PCF8594C)
|
||||
|
|
|
|||
|
|
@ -42,9 +42,10 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
/*
|
||||
* Ethernet/EMAC/PHY
|
||||
|
|
|
|||
|
|
@ -222,7 +222,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -122,7 +122,7 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
|
|
|
|||
|
|
@ -134,9 +134,9 @@
|
|||
* I2C stuff
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */
|
||||
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* avoid i2c probe hangup (?) */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
|
||||
|
||||
#if defined(CONFIG_CMD_EEPROM)
|
||||
|
|
|
|||
|
|
@ -329,7 +329,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -175,10 +175,11 @@
|
|||
* I2C configuration
|
||||
*
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* I2C slave address */
|
||||
|
||||
/*
|
||||
* MII PHY configuration
|
||||
|
|
|
|||
|
|
@ -174,10 +174,11 @@
|
|||
* I2C configuration
|
||||
*
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* I2C slave address */
|
||||
|
||||
/*
|
||||
* MII PHY configuration
|
||||
|
|
|
|||
|
|
@ -114,7 +114,7 @@
|
|||
/*
|
||||
* I2C stuff
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
|
||||
/* Temp sensor/hwmon/dtt */
|
||||
#define CONFIG_DTT_LM63 1 /* National LM63 */
|
||||
|
|
|
|||
|
|
@ -107,7 +107,7 @@
|
|||
/*
|
||||
* I2C stuff
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address*/
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
|
||||
/*
|
||||
* FLASH organization
|
||||
|
|
|
|||
|
|
@ -138,7 +138,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -145,7 +145,7 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed+slave address*/
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
/*
|
||||
* Default environment variables
|
||||
|
|
|
|||
|
|
@ -120,9 +120,8 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
|
|
|
|||
|
|
@ -228,7 +228,7 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -114,7 +114,7 @@
|
|||
/*
|
||||
* I2C stuff
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
|
||||
/* Temp sensor/hwmon/dtt */
|
||||
#define CONFIG_DTT_LM63 1 /* National LM63 */
|
||||
|
|
|
|||
|
|
@ -340,7 +340,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_PCA9698 1 /* NXP PCA9698 */
|
||||
|
||||
|
|
|
|||
|
|
@ -110,11 +110,11 @@
|
|||
/*
|
||||
* I2C stuff
|
||||
*/
|
||||
#undef CONFIG_HARD_I2C
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 400000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
|
|
|
|||
|
|
@ -119,9 +119,8 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_SPD_BUS_NUM 0 /* The I2C bus for SPD */
|
||||
|
||||
#define IIC0_BOOTPROM_ADDR 0x50
|
||||
|
|
|
|||
|
|
@ -385,7 +385,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
|||
|
|
@ -155,10 +155,11 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -134,7 +134,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -298,10 +298,11 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* RTC */
|
||||
#define CONFIG_SYS_I2C_EEPROM_CPU_ADDR 0x52 /* EEPROM (CPU Modul) */
|
||||
|
|
|
|||
|
|
@ -201,7 +201,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* I2C boot EEPROM (24C02BN) */
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@
|
|||
/*
|
||||
* I2C stuff
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
|
||||
/* RTC */
|
||||
#define CONFIG_RTC_DS1337
|
||||
|
|
|
|||
|
|
@ -151,7 +151,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -97,11 +97,12 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* Don't probe these addrs */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* I2C RTC
|
||||
|
|
|
|||
|
|
@ -139,10 +139,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa4>>1)
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
|
|
|
|||
|
|
@ -152,10 +152,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* bytes of address */
|
||||
|
|
|
|||
|
|
@ -110,13 +110,13 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define IIC0_BOOTPROM_ADDR 0x50
|
||||
#define IIC0_ALT_BOOTPROM_ADDR 0x54
|
||||
|
||||
/* Don't probe these addrs */
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54}
|
||||
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} }
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
|
||||
|
||||
|
|
|
|||
|
|
@ -168,10 +168,11 @@
|
|||
|
||||
#define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */
|
||||
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* PCI stuff
|
||||
|
|
|
|||
|
|
@ -246,15 +246,16 @@
|
|||
* IIC stuff
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
|
||||
#define I2C_INIT
|
||||
#define I2C_ACTIVE 0
|
||||
#define I2C_TRISTATE 0
|
||||
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* use the standard 100kHz speed */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F /* mask valid bits */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F /* mask valid bits */
|
||||
|
||||
#define CONFIG_RTC_DS1337
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
|
||||
|
|
|
|||
|
|
@ -232,7 +232,7 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -319,7 +319,7 @@
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -138,9 +138,9 @@
|
|||
* I2C stuff
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_NOPROBES { 0x69 } /* avoid i2c probe hangup (why?) */
|
||||
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } /* avoid i2c probe hangup (?) */
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */
|
||||
|
|
|
|||
|
|
@ -133,7 +133,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#undef CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
|
||||
|
|
|
|||
|
|
@ -95,7 +95,7 @@
|
|||
* I2C stuff
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -145,11 +145,11 @@ extern void out32(unsigned int, unsigned long);
|
|||
/*
|
||||
* I2C
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7f
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_PPC4XX
|
||||
#define CONFIG_SYS_I2C_PPC4XX_CH0
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
|
||||
|
||||
/* I2C EEPROM */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
|
||||
|
|
|
|||
|
|
@ -137,7 +137,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define CONFIG_SYS_I2C_MULTI_EEPROMS
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
|
||||
|
|
|
|||
|
|
@ -120,13 +120,13 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
|
||||
|
||||
#define IIC0_BOOTPROM_ADDR 0x50
|
||||
#define IIC0_ALT_BOOTPROM_ADDR 0x54
|
||||
|
||||
/* Don't probe these addrs */
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54}
|
||||
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} }
|
||||
|
||||
/* #if defined(CONFIG_CMD_EEPROM) */
|
||||
/* #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 */ /* I2C boot EEPROM */
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@ -168,10 +168,11 @@
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/*-----------------------------------------------------------------------
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* I2C
|
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*----------------------------------------------------------------------*/
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#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
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#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
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#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_PPC4XX
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#define CONFIG_SYS_I2C_PPC4XX_CH0
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#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
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#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
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/* these are for the ST M24C02 2kbit serial i2c eeprom */
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
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||||
|
|
|
|||
Loading…
Reference in a new issue