tegra: add clock_ll_start_uart() to enable UART prior to reloc
Most boards will want to enable a UART early. This function provides that feature in Tegra architecture code so the code does not need to be copied on every board. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -904,6 +904,20 @@ static int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon)
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return 0;
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}
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void clock_ll_start_uart(enum periph_id periph_id)
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{
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/* Assert UART reset and enable clock */
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reset_set_enable(periph_id, 1);
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clock_enable(periph_id);
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clock_ll_set_source(periph_id, 0); /* UARTx_CLK_SRC = 00, PLLP_OUT0 */
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/* wait for 2us */
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udelay(2);
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/* De-assert reset to UART */
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reset_set_enable(periph_id, 0);
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}
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int clock_verify(void)
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{
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struct clk_pll *pll = get_pll(CLOCK_ID_PERIPH);
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@ -344,6 +344,17 @@ unsigned clock_adjust_periph_pll_div(enum periph_id periph_id,
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*/
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unsigned clock_get_rate(enum clock_id clkid);
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/**
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* Start up a UART using low-level calls
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*
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* Prior to relocation clock_start_periph_pll() cannot be called. This
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* function provides a way to set up a UART using low-level calls which
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* do not require BSS.
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*
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* @param periph_id Peripheral ID of UART to enable (e,g, PERIPH_ID_UART1)
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*/
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void clock_ll_start_uart(enum periph_id periph_id);
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/*
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* Checks that clocks are valid and prints a warning if not
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*
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