board: Add Chameleonv3 board dir

Add board directory for Google Chameleon V3 board

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

board/google/chameleonv3/Makefile

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright 2022 Google LLC
+
+obj-y	:= board.o mercury_aa1.o

board/google/chameleonv3/board.c

@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include <net.h>
+#include <errno.h>
+#include "mercury_aa1.h"
+
+int misc_init_r(void)
+{
+	u8 mac[ARP_HLEN];
+	int res;
+
+	if (env_get("ethaddr"))
+		return 0;
+
+	res = mercury_aa1_read_mac(mac);
+	if (res) {
+		printf("couldn't read mac address: %s\n", errno_str(res));
+		return 0;
+	}
+
+	if (is_valid_ethaddr(mac))
+		eth_env_set_enetaddr("ethaddr", mac);
+
+	return 0;
+}

board/google/chameleonv3/fpga.its

@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+/dts-v1/;
+
+/ {
+	description = "FIT image with FPGA bistream";
+	#address-cells = <1>;
+
+	images {
+		fpga-periph-1 {
+			description = "FPGA full bitstream";
+			data = /incbin/("../../../fpga.rbf");
+			type = "fpga";
+			arch = "arm";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "config-1";
+		config-1 {
+			description = "Boot with FPGA config";
+			fpga = "fpga-periph-1";
+		};
+	};
+};

board/google/chameleonv3/fpga_early_io.its

@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+/dts-v1/;
+
+/ {
+	description = "FIT image with FPGA bistream";
+	#address-cells = <1>;
+
+	images {
+		fpga-periph-1 {
+			description = "FPGA peripheral bitstream";
+			data = /incbin/("../../../periph.rbf");
+			type = "fpga";
+			arch = "arm";
+			compression = "none";
+		};
+		fpga-core-1 {
+			description = "FPGA core bitstream";
+			data = /incbin/("../../../core.rbf");
+			type = "fpga";
+			arch = "arm";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "config-1";
+		config-1 {
+			description = "Boot with FPGA config";
+			fpga = "fpga-periph-1", "fpga-core-1";
+		};
+	};
+};

board/google/chameleonv3/mercury_aa1.c

@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include <net.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+#include <atsha204a-i2c.h>
+#include "mercury_aa1.h"
+
+#define MERCURY_AA1_ATSHA204A_OTP_MAC0 4
+#define MERCURY_AA1_ATSHA204A_OTP_MAC1 5
+
+int mercury_aa1_read_mac(u8 *mac)
+{
+	struct udevice *dev;
+	u8 buf[8];
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_MISC, "atsha204a@64", &dev);
+	if (ret)
+		return ret;
+
+	ret = atsha204a_wakeup(dev);
+	if (ret)
+		return ret;
+
+	ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
+			     MERCURY_AA1_ATSHA204A_OTP_MAC0, buf);
+	if (ret)
+		goto sleep;
+
+	ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
+			     MERCURY_AA1_ATSHA204A_OTP_MAC1, buf + 4);
+	if (ret)
+		goto sleep;
+
+	memcpy(mac, buf, ARP_HLEN);
+
+sleep:
+	atsha204a_sleep(dev);
+	return ret;
+}

board/google/chameleonv3/mercury_aa1.h

@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2022 Google LLC
+ */
+
+/**
+ * mercury_aa1_read_mac() - Read mac address from on-board OTP memory
+ *
+ * @mac: Returned mac address
+ * Return: 0 if successful, -ve on error
+ */
+int mercury_aa1_read_mac(u8 *mac);