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Implement __raw_{read,write}[bwl] on all architectures

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This adds implementations of __raw_read[bwl] and __raw_write[bwl] to
m68k, ppc, nios and nios2. The m68k and ppc implementations were taken
from Linux.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This commit is contained in:
Haavard Skinnemoen 2007-12-13 12:56:31 +01:00 committed by Stefan Roese
parent be60a9021c
commit 812711ce6b
4 changed files with 61 additions and 1 deletions
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14
include/asm-m68k/io.h
View file

@ -28,6 +28,20 @@
#include <asm/byteorder.h>
/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
* two accesses to memory, which may be undesirable for some devices.
*/
#define __raw_readb(addr) \
({ u8 __v = (*(volatile u8 *) (addr)); __v; })
#define __raw_readw(addr) \
({ u16 __v = (*(volatile u16 *) (addr)); __v; })
#define __raw_readl(addr) \
({ u32 __v = (*(volatile u32 *) (addr)); __v; })
#define __raw_writeb(addr,b) (void)((*(volatile u8 *) (addr)) = (b))
#define __raw_writew(addr,w) (void)((*(volatile u16 *) (addr)) = (w))
#define __raw_writel(addr,l) (void)((*(volatile u32 *) (addr)) = (l))
#define readb(addr) in_8((volatile u8 *)(addr))
#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
#if !defined(__BIG_ENDIAN)

8
include/asm-nios/io.h
View file

@ -23,6 +23,14 @@
#ifndef __ASM_NIOS_IO_H_
#define __ASM_NIOS_IO_H_
#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v))
#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v))
#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v))
#define __raw_readb(a) (*(volatile unsigned char *)(a))
#define __raw_readw(a) (*(volatile unsigned short *)(a))
#define __raw_readl(a) (*(volatile unsigned int *)(a))
#define readb(addr)\
({unsigned char val;\
asm volatile( " pfxio 0 \n"\

8
include/asm-nios2/io.h
View file

@ -33,6 +33,14 @@ extern unsigned char inb (unsigned char *port);
extern unsigned short inw (unsigned short *port);
extern unsigned inl (unsigned port);
#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v))
#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v))
#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v))
#define __raw_readb(a) (*(volatile unsigned char *)(a))
#define __raw_readw(a) (*(volatile unsigned short *)(a))
#define __raw_readl(a) (*(volatile unsigned int *)(a))
#define readb(addr)\
({unsigned char val;\
asm volatile( "ldbio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})

32
include/asm-ppc/io.h
View file

@ -120,6 +120,37 @@ static inline void isync(void)
#define iobarrier_r() eieio()
#define iobarrier_w() eieio()
/*
* Non ordered and non-swapping "raw" accessors
*/
#define __iomem
#define PCI_FIX_ADDR(addr) (addr)
static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
return *(volatile unsigned char *)PCI_FIX_ADDR(addr);
}
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
return *(volatile unsigned short *)PCI_FIX_ADDR(addr);
}
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
return *(volatile unsigned int *)PCI_FIX_ADDR(addr);
}
static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
{
*(volatile unsigned char *)PCI_FIX_ADDR(addr) = v;
}
static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
{
*(volatile unsigned short *)PCI_FIX_ADDR(addr) = v;
}
static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
{
*(volatile unsigned int *)PCI_FIX_ADDR(addr) = v;
}
/*
* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
*
@ -127,7 +158,6 @@ static inline void isync(void)
* is actually performed (i.e. the data has come back) before we start
* executing any following instructions.
*/
#define __iomem
extern inline int in_8(const volatile unsigned char __iomem *addr)
{
int ret;