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Merge branch '2019-08-30-master-imports'

Browse source 
- Assorted bug fixes
This commit is contained in:
Tom Rini 2019-08-31 17:38:02 -04:00
commit 7967290f51
16 changed files with 34 additions and 93 deletions
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4
Makefile
View file

@ -1700,7 +1700,7 @@ define filechk_defaultenv.h
(grep -v '^#' | \
grep -v '^$$' | \
tr '\n' '\0' | \
sed -e 's/\\\x0/\n/' | \
sed -e 's/\\\x0/\n/g' | \
xxd -i ; echo ", 0x00" ; )
endef
@ -1852,7 +1852,7 @@ clean: $(clean-dirs)
-o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
-o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \
-type f -print | xargs rm -f \
bl31.c bl31.elf bl31_*.bin image.map
bl31.c bl31.elf bl31_*.bin image.map tispl.bin*
# mrproper - Delete all generated files, including .config
#

10
arch/arm/Kconfig
View file

@ -1066,16 +1066,6 @@ config TARGET_VEXPRESS64_BASE_FVP
select PL01X_SERIAL
select SEMIHOSTING
config TARGET_VEXPRESS64_BASE_FVP_DRAM
bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
select ARM64
select PL01X_SERIAL
help
This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
the default config to allow the user to load the images directly into
DRAM using model parameters rather than by using semi-hosting to load
the files from the host filesystem.
config TARGET_VEXPRESS64_JUNO
bool "Support Versatile Express Juno Development Platform"
select ARM64

1
arch/arm/lib/cache.c
View file

@ -77,6 +77,7 @@ void noncached_init(void)
phys_addr_t start, end;
size_t size;
/* If this calculation changes, update board_f.c:reserve_noncached() */
end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) - MMU_SECTION_SIZE;
size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE);
start = end - size;

2
board/armltd/vexpress64/Kconfig
View file

@ -1,4 +1,4 @@
if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_JUNO || TARGET_VEXPRESS64_BASE_FVP_DRAM
if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_JUNO
config SYS_BOARD
default "vexpress64"

5
board/armltd/vexpress64/MAINTAINERS
View file

@ -10,11 +10,6 @@ M: Linus Walleij <linus.walleij@linaro.org>
S: Maintained
F: configs/vexpress_aemv8a_semi_defconfig
VEXPRESS_AEMV8A_DRAM BOARD
M: Ryan Harkin <ryan.harkin@linaro.org>
S: Maintained
F: configs/vexpress_aemv8a_dram_defconfig
JUNO DEVELOPMENT PLATFORM BOARD
M: Linus Walleij <linus.walleij@linaro.org>
S: Maintained

5
board/siemens/common/board.c
View file

@ -189,14 +189,11 @@ void set_env_gpios(unsigned char state)
{
char *ptr_env;
char str_tmp[5]; /* must contain "ledX"*/
char num[1];
unsigned char i, idx, pos1, pos2, ccount;
unsigned char gpio_n, gpio_s0, gpio_s1;
for (i = 0; i < MAX_NR_LEDS; i++) {
strcpy(str_tmp, "led");
sprintf(num, "%d", i);
strcat(str_tmp, num);
sprintf(str_tmp, "led%d", i);
/* If env var is not found we stop */
ptr_env = env_get(str_tmp);

15
common/board_f.c
View file

@ -470,9 +470,18 @@ static int reserve_uboot(void)
#ifdef CONFIG_SYS_NONCACHED_MEMORY
static int reserve_noncached(void)
{
/* round down to SECTION SIZE (typicaly 1MB) limit */
gd->start_addr_sp &= ~(MMU_SECTION_SIZE - 1);
gd->start_addr_sp -= CONFIG_SYS_NONCACHED_MEMORY;
/*
* The value of gd->start_addr_sp must match the value of malloc_start
* calculated in boatrd_f.c:initr_malloc(), which is passed to
* board_r.c:mem_malloc_init() and then used by
* cache.c:noncached_init()
*
* These calculations must match the code in cache.c:noncached_init()
*/
gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
MMU_SECTION_SIZE;
gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
MMU_SECTION_SIZE);
debug("Reserving %dM for noncached_alloc() at: %08lx\n",
CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);

4
common/board_r.c
View file

@ -247,6 +247,10 @@ static int initr_malloc(void)
gd->malloc_ptr / 1024);
#endif
/* The malloc area is immediately below the monitor copy in DRAM */
/*
* This value MUST match the value of gd->start_addr_sp in board_f.c:
* reserve_noncached().
*/
malloc_start = gd->relocaddr - TOTAL_MALLOC_LEN;
mem_malloc_init((ulong)map_sysmem(malloc_start, TOTAL_MALLOC_LEN),
TOTAL_MALLOC_LEN);

1
configs/am43xx_evm_qspiboot_defconfig
View file

@ -50,6 +50,7 @@ CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_TI_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y

1
configs/am43xx_evm_rtconly_defconfig
View file

@ -49,6 +49,7 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y

1
configs/am43xx_hs_evm_defconfig
View file

@ -59,6 +59,7 @@ CONFIG_TI_QSPI=y
CONFIG_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y

1
configs/mt7623n_bpir2_defconfig
View file

@ -31,7 +31,6 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_BLOCK_CACHE is not set
CONFIG_CLK=y
CONFIG_DM_MMC=y
# CONFIG_MMC_QUIRKS is not set

39
configs/vexpress_aemv8a_dram_defconfig
View file

@ -1,39 +0,0 @@
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM=y
CONFIG_SYS_TEXT_BASE=0x88000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_IDENT_STRING=" vexpress_aemv8a"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 androidboot.hardware=fvpbase root=/dev/vda2 rw rootwait loglevel=9"
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_LOADS is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_UBI=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_DM=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_DM_SERIAL=y
CONFIG_OF_LIBFDT=y

14
drivers/block/blk-uclass.c
View file

@ -208,11 +208,7 @@ int blk_select_hwpart_devnum(enum if_type if_type, int devnum, int hwpart)
if (ret)
return ret;
ret = blk_select_hwpart(dev, hwpart);
if (!ret)
blkcache_invalidate(if_type, devnum);
return ret;
return blk_select_hwpart(dev, hwpart);
}
int blk_list_part(enum if_type if_type)
@ -352,13 +348,7 @@ int blk_select_hwpart(struct udevice *dev, int hwpart)
int blk_dselect_hwpart(struct blk_desc *desc, int hwpart)
{
int ret;
ret = blk_select_hwpart(desc->bdev, hwpart);
if (!ret)
blkcache_invalidate(desc->if_type, desc->devnum);
return ret;
return blk_select_hwpart(desc->bdev, hwpart);
}
int blk_first_device(int if_type, struct udevice **devp)

7
drivers/mmc/mmc-uclass.c
View file

@ -360,6 +360,7 @@ static int mmc_select_hwpart(struct udevice *bdev, int hwpart)
struct udevice *mmc_dev = dev_get_parent(bdev);
struct mmc *mmc = mmc_get_mmc_dev(mmc_dev);
struct blk_desc *desc = dev_get_uclass_platdata(bdev);
int ret;
if (desc->hwpart == hwpart)
return 0;
@ -367,7 +368,11 @@ static int mmc_select_hwpart(struct udevice *bdev, int hwpart)
if (mmc->part_config == MMCPART_NOAVAILABLE)
return -EMEDIUMTYPE;
return mmc_switch_part(mmc, hwpart);
ret = mmc_switch_part(mmc, hwpart);
if (!ret)
blkcache_invalidate(desc->if_type, desc->devnum);
return ret;
}
static int mmc_blk_probe(struct udevice *dev)

17
include/configs/vexpress_aemv8a.h
View file

@ -16,8 +16,7 @@
#define CONFIG_REMAKE_ELF
/* Link Definitions */
#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
/* ATF loads u-boot here for BASE_FVP model */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
#elif CONFIG_TARGET_VEXPRESS64_JUNO
@ -83,8 +82,7 @@
#define GICR_BASE (0x2f100000)
#else
#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
#define GICD_BASE (0x2f000000)
#define GICC_BASE (0x2c000000)
#elif CONFIG_TARGET_VEXPRESS64_JUNO
@ -191,17 +189,6 @@
"booti $kernel_addr - $fdt_addr"
#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM
#define CONFIG_EXTRA_ENV_SETTINGS \
"kernel_addr=0x80080000\0" \
"initrd_addr=0x84000000\0" \
"fdt_addr=0x83000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0"
#define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr"
#endif
/* Monitor Command Prompt */