imx: mx6: ddr add mpzqlp2ctl entry
Add mpzqlp2ctl entry for mx6_mmdc_calibration. MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
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@ -414,6 +414,8 @@ struct mx6_mmdc_calibration {
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/* write delay */
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u32 p0_mpwrdlctl;
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u32 p1_mpwrdlctl;
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/* lpddr2 zq hw calibration */
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u32 mpzqlp2ctl;
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};
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/* configure iomux (pinctl/padctl) */
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