imx: mx6: ddr add mpzqlp2ctl entry

Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
This commit is contained in:
Peng Fan 2015-08-17 16:11:01 +08:00 committed by Stefano Babic
parent 1b811e285c
commit 775d591f5d

View file

@ -414,6 +414,8 @@ struct mx6_mmdc_calibration {
/* write delay */
u32 p0_mpwrdlctl;
u32 p1_mpwrdlctl;
/* lpddr2 zq hw calibration */
u32 mpzqlp2ctl;
};
/* configure iomux (pinctl/padctl) */