arm64: zynqmp: Add missing ZYNQMP_FIRMWARE dependencies

There are missing Kconfig dependencies in the code which is using
firmware interface.
The commit 71efd45a5f ("arm64: zynqmp: Change firmware dependency")
add option to also disable ZYNQMP_FIRMWARE. But not all Kconfig
dependencies were properly described and also sdhci and gem drivers
didn't protect the code properly.
So, add the missing ZYNQMP_FIRMWARE dependencies.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230201095553.11219-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Algapally Santosh Sagar 2023-02-01 02:55:53 -07:00 committed by Michal Simek
parent 70ed05ce6c
commit 6d87b1572f
5 changed files with 7 additions and 6 deletions

View file

@ -6,6 +6,7 @@ if ARCH_ZYNQMP
config CMD_ZYNQMP config CMD_ZYNQMP
bool "Enable ZynqMP specific commands" bool "Enable ZynqMP specific commands"
depends on ZYNQMP_FIRMWARE
default y default y
help help
Enable ZynqMP specific commands like "zynqmp secure" Enable ZynqMP specific commands like "zynqmp secure"

View file

@ -185,7 +185,7 @@ config CLK_VERSACLOCK
config CLK_VERSAL config CLK_VERSAL
bool "Enable clock driver support for Versal" bool "Enable clock driver support for Versal"
depends on (ARCH_VERSAL || ARCH_VERSAL_NET) depends on (ARCH_VERSAL || ARCH_VERSAL_NET)
select ZYNQMP_FIRMWARE imply ZYNQMP_FIRMWARE
help help
This clock driver adds support for clock realted settings for This clock driver adds support for clock realted settings for
Versal platform. Versal platform.
@ -219,7 +219,7 @@ config CLK_ZYNQ
config CLK_ZYNQMP config CLK_ZYNQMP
bool "Enable clock driver support for ZynqMP" bool "Enable clock driver support for ZynqMP"
depends on ARCH_ZYNQMP depends on ARCH_ZYNQMP
select ZYNQMP_FIRMWARE imply ZYNQMP_FIRMWARE
help help
This clock driver adds support for clock realted settings for This clock driver adds support for clock realted settings for
ZynqMP platform. ZynqMP platform.

View file

@ -75,7 +75,7 @@ config FPGA_XILINX
config FPGA_ZYNQMPPL config FPGA_ZYNQMPPL
bool "Enable Xilinx FPGA driver for ZynqMP" bool "Enable Xilinx FPGA driver for ZynqMP"
depends on FPGA_XILINX depends on FPGA_XILINX && ZYNQMP_FIRMWARE
help help
Enable FPGA driver for loading bitstream in BIT and BIN format Enable FPGA driver for loading bitstream in BIT and BIN format
on Xilinx Zynq UltraScale+ (ZynqMP) device. on Xilinx Zynq UltraScale+ (ZynqMP) device.

View file

@ -988,7 +988,7 @@ static const struct sdhci_ops arasan_ops = {
}; };
#endif #endif
#if defined(CONFIG_ARCH_ZYNQMP) #if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_ZYNQMP_FIRMWARE)
static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv, static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv,
struct udevice *dev) struct udevice *dev)
{ {
@ -1090,7 +1090,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
host = priv->host; host = priv->host;
#if defined(CONFIG_ARCH_ZYNQMP) #if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_ZYNQMP_FIRMWARE)
if (device_is_compatible(dev, "xlnx,zynqmp-8.9a")) { if (device_is_compatible(dev, "xlnx,zynqmp-8.9a")) {
ret = zynqmp_pm_is_function_supported(PM_IOCTL, ret = zynqmp_pm_is_function_supported(PM_IOCTL,
IOCTL_SET_SD_CONFIG); IOCTL_SET_SD_CONFIG);

View file

@ -738,7 +738,7 @@ static int gem_zynqmp_set_dynamic_config(struct udevice *dev)
u32 pm_info[2]; u32 pm_info[2];
int ret; int ret;
if (IS_ENABLED(CONFIG_ARCH_ZYNQMP)) { if (IS_ENABLED(CONFIG_ARCH_ZYNQMP) && IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {
if (!zynqmp_pm_is_function_supported(PM_IOCTL, if (!zynqmp_pm_is_function_supported(PM_IOCTL,
IOCTL_SET_GEM_CONFIG)) { IOCTL_SET_GEM_CONFIG)) {
ret = ofnode_read_u32_array(dev_ofnode(dev), ret = ofnode_read_u32_array(dev_ofnode(dev),